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Professional Development Course [clear filter]
Sunday, October 14
 

8:30am CDT

PDC 01: Design and Assembly Process Principles for High Density Flexible and Rigid Flex Circuits
PDC1: Design and Assembly Process Principles for High Density Flexible and Rigid Flex Circuits

Vern Solberg, Solberg Technical Consulting
Sunday, October 14 | 8:30am — 12:00pm

Course Objectives
This tutorial focuses on implementing best design practices for flexible and rigid flex circuits, the study of alternative fabrication methodologies and planning for automated assembly process efficiency. Information presented will include the selection criteria for base materials for flexible circuit applications, alternative fabrication methodologies, SMT component selection and land pattern development, the requirements for documentation and features required to accommodate SMT-on-flex assembly processing.

Course objectives- Furnish design professionals, systems engineers, assembly and test engineering specialists with a thorough understanding of the materials, fabrication process variations and preferred design practices for flexible and rigid-flex circuits. In addition, extensive detail is furnished regarding preparation for automated SMT assembly including guidance in panel planning to best accommodate current assembly process methodologies.

Topics Covered
1. Applications, standards and defining product use environments
2. Flex circuit construction alternatives
3. Flex and Rigid Flex circuit fabrication process variations
4. SMT component selection and land pattern development
5. Specifying base material, plating and coating 6. Assembly process implementation

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 50

8:30am CDT

PDC 02: Jump Start – An Introduction to SMT Process Basics and Troubleshooting - FREE TO ALL ATTENDEES!
**FREE to all attendees!

PDC2: Jump Start – An Introduction to SMT Process Basics and Troubleshooting

Expert Instructors:
•   *Chrys Shea, Shea Engineering Services
•   Tom Foley, ASM Assembly Systems, LLC
•   Fred Dimock, BTU International

In-Person Moderator: Keith Favre, FHP Reps
On-line Moderator: Mike Buetow, Circuits Assembly Magazine

Sunday, October 14| 8:30am — 12:00pm

This free course is open for all to attend. Its objective is to deliver a basic understanding of SMT fundamentals to technical professionals new to the industry, and will be presented by the following subject matter experts.

Can't make it live? Sign up here to attend via webinar:
https://attendee.gotowebinar.com/register/5397047776691614466 

What You Will Learn:
•    Process Basics
•    Troubleshooting Methods
•    SMT Survival Skills

For Three Core SMT Processes:
•    Stencil Printing
•    Placement
•    Reflow

Who Should Attend:
Engineers, technicians, quality personnel who want to:
•    Learn more about SMT assembly
•    Get more uptime on their assembly lines
•    Improve yields on their assembly lines
•    Reinforce the basics before attending more advanced programs at the conference

Topics Covered
SOLDER PASTE PRINTING – Chrys Shea, Shea Engineering Services
1.    Solder Paste Behavior
   1.1.    Properties & characteristics
   1.2.    Behaviors during the printing process
   1.3.    Printability differences between no-clean and water wash, tin-lead and lead-free
2.    Mechanics of the Printing Process
   2.1.    Alignment and gasketing
   2.2.    PCB support
   2.3.    Squeegee or direct print head motion
   2.4.    Paste setup & release
   2.5.    Area ratios and transfer efficiencies
3.    Troubleshooting Process Problems
   3.1.    5-minute system check
   3.2.    Typical defects and likely root causes to investigate

COMPONENT PLACEMENT – Tom Foley, ASM Assembly Systems
4.    Placement Machine Fundamentals
   4.1.    Component Supply
   4.2.    Placement Head & Vision System
   4.3.    Nozzles & Grippers
5.    Placement Machine Software Fundamentals
   5.1.    Placement Program Optimization
   5.2.    Line Changeover Software
   5.3.    Line Productivity Software
6.    Drivers for High Quality Placement

SOLDER REFLOW – Fred Dimock, BTU
7.    Purpose of Solder Reflow
   7.1.    Oven recipe
   7.2.    Profiles
   7.3.    Process Windows
8.    Material Properties
   8.1.    Solder
      8.1.1.    Eutectic
      8.1.2.    Non -eutectic
   8.2.    Flux with a Purpose
9.    Profile shapes
   9.1.    Heating Rate
   9.2.    Soak
   9.3.    Spike
   9.4.    Cooling Rate
10.    Obtaining Profiles

OPEN QUESTION AND ANSWER PERIOD
In-Person Moderator: Keith Favre, FHP Reps
On-line Moderator: Mike Buetow, Circuits Assembly Magazine

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 51

8:30am CDT

PDC 03: The Incredible Shrinking World Of Electronics – Are Traditional DFM, DFR, DFF Methods Obsolete?
PDC3: The Incredible Shrinking World Of Electronics – Are Traditional DFM, DFR, DFF Methods Obsolete?

*Dale Lee, Plexus Corp.
Sunday, October 15 | 8:30am — 12:00pm

Course Objectives
Today’s electronic component packaging technologies of smaller packages (0201/01005/008003), finer lead pitch (0.4/0.35/0.3/…), bottom terminated components (QFN/LGA) and printed circuit board designs (high layer counts, finer lines, via in pad (VIP), increased copper thicknesses, copper routing, …), increased thermal sensitivity, trailing component, fabrication and assembly industry standards have impacted traditional assembly processes with addition of tight solder application, component placement, thermal management and soldering constraints. Using traditional, simplified mass production techniques are not be sufficient to achieve a high-yielding manufacturing process. This presentation will highlight elements of the impacts of these technologies on reliability and yield when not properly addressed in the design/assembly/inspection-test process, impacts of thermal connections on through-hole and surface soldering processes, introduce the elements of design for matched process (DFMP), and provide examples of several opportunities within the DFMP for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching. The concept of manufacturing, test, reliability by design (XBD) will be presented.

Topics Covered
1. Component packaging impacts
2. PCB design impacts and industry standards limitations
3. SMT and PTH solder design impacts
4. Components with thermal management impacts:
Component design
PCB Thermal balance: X, Y and Z axis
Trace routing
Equipment limitation/tolerance
PCB array tolerance
5. Process tooling design
6. Process control impacts
7. Paste volume, thermal shock SMT and PTH, reflow process warpage
8. Cleaning impacts
9. Compatibility issues, low stand-off components

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 52

8:30am CDT

PDC 04: Reflow, Wave and Rework Soldering Process Optimization in Electronics Manufacturing
PDC4: Reflow, Wave and Rework Soldering Process Optimization in Electronics Manufacturing

*Jasbir Bath, Bath Consultancy LLC
Sunday, October 14 | 8:30am — 12:00pm

Course Objectives
The soldering processes for reflow, wave and rework soldering are essential processes to optimize to improve yield and reliability. The course will review reflow, wave and rework soldering materials and processes with a focus on optimization of preheat and soldering temperatures and times. It will cover typical soldering issues which can occur during reflow, wave and rework with a review of profiles which can be used to help address them with a review of board and component temperature ratings. It will discuss interactions with different board and components having different surface finishes in relation to microstructure and reliability for these processes and factors which should be optimized for improved results.

Topics Covered
1. Reflow, Wave and Rework Soldering materials and processes
2. Common Reflow, Wave and Rework Problems
3. Component and Board Temperature Ratings and Component and Board Surface Finishes
4. Microstructure and Reliability
5. Case studies to optimize soldering processes

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 40

8:30am CDT

PDC 05: Tin Whiskers: A 2018 State of the Industry Assessment
PDC5: Tin Whiskers: A 2018 State of the Industry Assessment

*David Hillman. Rockwell Collins
Sunday, October 14 | 8:30am — 12:00pm

Course Objectives
Tin Whiskers were investigated and "solved" in the 1950s so why are we talking about them in 2018? The objective of this tin whisker course is to : (1) Provide a basic understanding of a tin whisker phenomena; (2) Provide data and resources allowing an attendee to create a tin whisker mitigation protocol applicable for their product/use environment; (3) Provide an update of some of the latest industry tin whisker investigations, testing results, and publicized product failures.

Topics Covered
1. Tin Whiskers 101
2. Tin Whisker Mitigations that You Don't Control
3. Tin Whisker Mitigations that You Do Control
4. Current Industry Tin Whisker Investigations

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 53

1:30pm CDT

PDC 07: Interconnections: PCB and Solder – Not Just Your Normal Failure Modes Any More
PDC 07: Interconnections: PCB and Solder – Not Just Your Normal Failure Modes Any More

*Dale Lee, Plexus Corp.
Sunday, October 15 | 1:30pm — 5:00pm

Course Objectives
Design densities for electronic assemblies have increased the interconnection density of PCB’s and component solder connections. This increase density has resulted in smaller via diameters for traditional and micro via hole, complex via structures, terminations of via holes into component mounting pads, decreased component mounting pads and increased diversity of routing terminations to component lead pads. This complexity in interconnection and density of interconnections combined with decreasing component lead pitches and lagging development of industry standards to address these changes has created opportunities for new PCB and solder joint formation failure modes.

As technology continues to march forward, new interconnection failure modes will continue to develop. This presentation will review many of the new PCB interconnection/PCB to solder joint/solder joint failure modes and methods for identification of potential failures/reliability and some recommended potential design/assembly process solutions.

Topics Covered
*TBD

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 52

1:30pm CDT

PDC 08: Printing and Its Affect on Manufacturing Yield
PDC8: Printing and Its Affect on Manufacturing Yield

*Jasbir Bath, Bath Consultancy LLC
Sunday, October 14 | 1:30pm — 5:00pm

Course Objectives
The printing process is one of the most critical processes to optimize to improve manufacturing yield. The course will review stencil aperture requirements of a variety of components, stencil thicknesses, types of stencils, the printing process, printing DOEs, and solder paste use and selection in order to understand the key factors which need to be optimized for successful printing.

Topics Covered
1. Printing Processes and Stencil Types/ Guidelines
2. Common Printing Problems
3. Solder paste material types
4. Stencil design
5. Print DOEs
6. Component Trends
7. Case studies for optimizing print volumes to reduce defects such as Head-in-Pillow

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 40

1:30pm CDT

PDC 09: New Developments in Selective Soldering Technology
PDC9: New Developments in Selective Soldering Technology

Bob Klenke, ITM Consulting
Sunday, October 14 | 1:30pm — 5:00pm

Course Objectives
Selective soldering technology is playing an increasingly critical role in the assembly and reliability of solder interconnections within mixed-technology printed circuit board assemblies. This course reviews new developments in selective soldering technology and outlines their impact upon the electronic assembly landscape. This workshop is based on real-world consulting experience with selective soldering processes procedures and techniques. Best practices together with potential solutions for improving manufacturing yields and reliability will be discussed in detail.

Topics Covered
1. Automatic fiducial location and skew correction • Automatic board warpage compensation
2. Advanced drop-jet flux deposition
3. In-process flux verification
4. Mitigation of no-clean flux residues
5. Dual solder nozzle functionality and benefits
6. Integrated wave soldering capability and advantages
7. Ultra-fine pitch selective soldering
8. Graphics-based programming advanced parameters
9. Advances in solder nozzle design
10. Traceability and data logging compatibility with FIS and Industry 4.0 protocols
11. AOI solder joint inspection methodologies
12. Automatic solder nozzle cleaning and solder nozzle tinning methods
13. High-volume, high-performance soldering
14. Simultaneous parallel and independent double processing modes
15. Variable center distance soldering of multi-up panels
16. On-the-fly continuous motion selective soldering

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 53

1:30pm CDT

PDC 10: Solder Paste Qualification Using the SMTA Miniaturization Test Vehicle
PDC10: Solder Paste Qualification Using the SMTA Miniaturization Test Vehicle

*Chrys Shea, Shea Engineering Services
Sunday, October 14 | 1:30pm — 5:00pm

Course Objectives
This brand-new, half-day workshop focuses on solder paste and how to select the best one for an operation using the new SMTA Miniaturization Test Vehicle. Solder pastes have over 20 individual characteristics that must be considered during the selection process. Moreover, some characteristics conflict with each other and the tradeoffs must be carefully considered when determining the best process chemistry in order to avoid surprises on the production line. Many operations delay updating their soldering materials because of the high cost, lost production time, and complexity of the materials. These concerns have been met with a low-cost evaluation kit that minimizes line time, maximizes test efficiency, and demonstrates the tradeoffs in performance characteristics. The kit includes pre-designed PCB boards and components; an active spreadsheet to configure the PCB population, cost and sample sizes; stencil and vacuum board support designs; ODB++ database; placement files; SPI files; step-by-step directions for a 30-print DOE; an SMT soldering reference manual; directions for statistical reduction; and the customizable Score Card, which helps assemblers understand the tradeoffs involved and chose the best possible product. The hardware for the kit is available for purchase from commercial suppliers; the documentation and user files are available for FREE download from a website. This course discusses each characteristic of solder paste, how it impacts the SMT process, how the kit tests it, and how and why the board was designed. The Score Card is the key to customizing the test to a specific operation. Attendees will be encouraged to consider the solder paste characteristics on the Score Card as it relates to their SMT operations in an open discussion forum.

Topics Covered
1. Kit Overview
2. Solder Paste Characteristics
2.1.Categories and details
3. PCB Design
3.1.Top Side Elements
3.2.Bottom Side Elements
4. Components
4.1.Size Range
4.2.Cost Range
4.3.Bill of Materials Configurator Spreadsheet
5. Nesting the Tests for Efficiency
5.1.One side sits for abandon test while the other side gets worked in a shear test
6. Test Execution Order
6.1.Top Side
6.2.Bottom Side
6.3.Bottom Side
6.4.Top Side
7. Data Collection and Reduction
7.1.Print
7.2.Reflow
8. Score Card
8.1.Weighting each factor on importance to the specific operation and open discussion
8.2.Ranking each paste’s performance relative to each other
8.3.Category subtotals - Tradeoffs
8.4.Overall score
9. Fatal Flaws
9.1.Graping
9.2.Voiding
9.3.Peaking
9.4.Wipe Sensitivity
9.5.Other
10. Other uses for the SMTA MTV
11. Q&A

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 51
 
Monday, October 15
 

8:30am CDT

PDC 11: Design and Assembly Process Challenges for Bottom Terminations Components (BTCs) such as QFN, DFN and MLF in Tin-Lead & Lead Free World
PDC11: Design and Assembly Process Challenges for Bottom Terminations Components (BTCs) such as QFN, DFN and MLF in Tin-Lead & Lead Free World.

*Ray Prasad, Ray Prasad Consultancy Group
Monday, October 15 | 8:30am — 12:00pm


Course Objectives
Bottom Termination surface mount Components (BTCs) go by various names such as QFN, DFN, SON, LGA, MLP, and MLF, which utilize surface to surface interconnections. BTCs are like BGAs which also have hidden terminations, but they are also very different. BTCs do not have spheres but rather metallized terminations or pads underneath the package. This minor difference in the physical I/O shape makes all the difference in design, assembly and rework between BTCs and BGAs.
Since there are no leads or balls in BTCs to take up any slack from package or board warpage, you essentially need perfection in design and assembly process. When was the last time you saw every thing perfect on any manufacturing floor?
One must also keep in mind that these parts are not the only components that must be mounted on the board. Look at any board. It will have other packages such as BGAs, fine pitch and even some through-hole components; and those components have their own unique design and assembly implementation requirements. So designing for BTCs may involve trial and error and lot of frustration by many companies. Additional frustration is caused by fast-paced changes in packaging technologies and the advent of Lead Free has compounded the designer’s task.
When it comes to inspection, BTCs pose even more challenge than BGAs. What you may see in visual inspection may look bad but may really be acceptable. And what you don’t or can’t see may really be critical. And the fact that the Process Engineer must worry about both too much solder and too little solder on the same BTC package makes the quality engineer nervous about field returns.
The objective of the course is to get away from the trial and error approach and provide you successful design and process practices commonly used by the industry. This course will cover the practical details of BTC design and assembly processes.
This course is based on Surface Mount Technology: Principles by Ray Prasad and Practice and IPC 7093 Design and Assembly Process Guidelines for BTCs also co-chaired Ray. This course identifies many of the characteristics that influence the successful implementation of robust and reliable BTC assembly processes.
This is not a theoretical course. It s based on Mr. Prasad's over two decades of experience at Boeing, Intel and numerous clients and deals with "real-world" problems in lead free and tin-lead BTC implementation.

Topics Covered
1. Introduction
Pros and Cons of BTC
Pull Back Vs Non Pull Back
BTC Package Manufacturing Process
2. Major Design Considerations for BTCs
Laminates and Surface Finish Considerations
Land Pattern and Stencil Design Guidelines
Component considerations
3. Assembly Process Guidelines for BTC
Solder Paste Printing- the Key Process Step
Reflow Process Guidelines
BTC Solder Joint Quality Requirements
BTC Rework Process
4. Key strategies in design and manufacturing processes to prevent field returns

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 50

8:30am CDT

PDC 12: Achieving High Reliability for Lead-Free Solder Joints - Materials Consideration
PDC12: Achieving High Reliability for Lead-Free Solder Joints - Materials Consideration

*Ning- Cheng Lee, Ph.D., Indium Corporation
Monday, October 15 | 8:30am — 12:00pm

Course Objectives
This course covers the detailed material considerations required for achieving high reliability for lead-free solder joints. The reliability discussed includes joint mechanical properties, development of type and extent of intermetallic compounds (IMC) under a variety of material combinations and aging conditions and how those IMCs affect the reliability. The failure modes, thermal cycling reliability, and fragility of solder joints as a function of material combination, thermal history, and stress history will be addressed in details, and novel alloys with reduced fragility will be presented. Electromigration, corrosion, and tin whisker will also be discussed. The emphasis of this course is placed on the understanding of how the various factors contributing to the failure modes, and how to select proper solder alloys and surface finishes for achieving high reliability. Also will be presented are the desirable future alloys and fluxes in order to meet the challenge of miniaturization.

Topics Covered
1. Implementation Status
2. Prevailing Materials
1) Prevailing Solder Alloys
2) Prevailing Surface Finishes
3. Surface Finishes Issues
1) Issues of ENIG
2) Issues of ImAg
4. Mechanical Properties
1) Shear & Pull Strength
2) Creep
5. Intermetallic Compounds
1) Interaction of Cu and Ni
2) Effect of Cu Content in SAC
3) Effect of Ni in Cu Pad
4) Effect of Alloy Additives
5) Effect of Heat History
6) Formation of Interfacial Void
6. Failure Modes
1) Grain Boundary Sliding & Cavitation
2) Grain Coarsening
3) Grain Orientation
4) Lead Contamination
5) Mixed Alloys
6) Interfacial Voiding
7. Thermal Cycle Reliability
1) Effect of Thermal Cycle Test Condition
2) Effect of PCB Surface Finish Cu vs Ni
3) Effect of Reflow Temperature
4) Reliability of Reworked SMT Joints
8. Reliability of Through-Hole Joints
1) Large and Thick Board
2) Partially Filled Through-Hole
9. Fragility
1) Fragility of Lead-Free Solder Joints
2) Effect of Component Finish
3) Effect of Alloy, PCB Surface Finish, Reflow History, and Strain Rate
4) Effect of IMC Thickness
5) Effect of Isothermal Aging
6) Effect of Thermal Cycling
7) Effect of Intermetallic Morphology
8) Novel Alloys with Reduced Fragility
10. Reliability – Electromigration
1) Influence of Electromigration and Temperature on Resistance
2) Effect of Current Density & Back Stress on IMC Thickness
3) Effect of Current on IMC Thickness, Joint Temp and Strain
4) Effect of Electromigration on Mechanical Property
5) Effect of Cu UBM Thickness on Electromigration
11. Reliability – Corrosion
1) SAC405
2) Corrosion Resistance of PWB Finishes
12. Tin Whisker

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 53

8:30am CDT

PDC 13: Solder Joint Reliability – Principles and Applications
PDC13: Solder Joint Reliability – Principles and Applications

Jennie Hwang, Ph.D., H- Technologies Group
Monday, October 14 | 8:30am — 12:00pm

Course Objectives
The course emphasizes on practical, working knowledge, yet balanced and substantiated with science by outlining solder joint reliability fundamentals in fatigue and creep damage mechanisms via ductile, brittle, ductile-brittle fracture, and by discussing the critical “players” of solder joint reliability (e.g., manufacturing process, PCB/component coating surface finish, solder alloys). Likely solder joint failure modes of interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced and surface cracks will be illustrated. To withstand harsh environments, the strengthening metallurgy to further increase fatigue resistance and creep resistance, and the power of metallurgy and its ability to anticipate the relative performance will be illustrated by discussing the comparative performance vs. metallurgical phases and microstructure. The question on whether a life-prediction model can assure reliability will be discussed. A relative reliability ranking among commercially available solder systems, as well as the scientific, engineering and manufacturing reasons behind the ranking will be outlined. Attendees are encouraged to bring their own selected systems for deliberation.

Topics Covered
1. Premise – reliability, solder joint thermo-mechanical degradation – fatigue and creep interaction
2. Solder joint failures modes - interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced, surface-crack, and others
3. Solder joint failure mechanisms – ductile, brittle, ductile-brittle transition fracture
4. Solder joint strengthening metallurgy
5. Illustration of microstructure evolution vs. strengthening in Sn Cu+x,y,z and SnAgCu+x,y,z systems
6. Solder joint voids vs. reliability - causes, effects, criteria
7. Solder joint surface-crack –causes, effects
8. Distinctions and commonalties between Pb-free and SnPb solder joints
9. Thermal cycling conditions - effects on test results and test results interpretation
10. Testing solder joint reliability – discriminating tests and discerning parameters
11. Life-prediction model vs. reliability
12. Solder joint performance in harsh environments
13. What solder alloys are on the horizon and what impact will be on reliability
14. Best practices and competitive manufacturing
15. Ultimate reliability


Monday October 15, 2018 8:30am - 12:00pm CDT
Room 40

8:30am CDT

PDC 14: Weeding Out PCB Fabrication Defects Before Assembly:
PDC14: Weeding Out PCB Fabrication Defects Before Assembly:

Bihari Patel, Bihari Patel SMT Connection
Monday, October 15 | 8:30am — 12:00pm

Course Objectives
With the Lead Free transition and green revolution changes completed at Assemblers and Fabricators to meet demands of higher densities for Printed Circuit Boards presenter will share his experiences. Global sourcing of PCBs is a reality with larger batch quantities, to prevent line stoppage and expensive rework, it is important that emphasis be placed on PCBs prior to assembly to highlight issues and prevent future issues prior to use. Ensuring quality PCBs are entering in the assembly process, resulting in higher first pass yield and reduced rework associated with PCB quality deficiency. This workshop will highlight any deficiency in PCB fabrication and ones following best practices will be exhibit their strengths against other fabricators. Will also cover key result areas in Assembly Process and Metal Core - LED PCBs their assembly challenges.

Topics Covered
1. Lead Free and Leaded assembly of circuit boards showing defects experienced related to PCB fabrication.
2. 101 of PCB Fabrication for Contract Electronic Manufacturing and Original Equipment Manufacturer
3. Process Control and applicable specifications for outgoing quality.
4. Descriptions with examples of applicable test methods, including reference to IPC documentation
5. Top twenty defects will be highlighted and with emphasis on how to detect, report and get corrective actions for prevention.
6. Fabricator selection, source Inspection and ongoing preferred fabricator audits
7. Case Studies
8. Metal Core - LED PCBs and assembly challenges

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 51

8:30am CDT

PDC 15: Defect Analysis and Process Troubleshooting: Part 1
PDC15: Defect Analysis and Process Troubleshooting: Part 1

*Phil Zarrow & *Jim Hall, ITM Consulting
Monday, October 15 | 8:30am — 12:00pm

Course Objectives
We don’t assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design

Topics Covered
Introduction Prevention: Process Development and Validation Variation (Common Cause) Continuous Improvement Defect Definition Failure Reduced Reliability Process Indicator Special Cause vs. Common Cause Defect Identification Inspection Manual AOI X-Ray Test ICT Functional Contamination False Calls / Escapes Causes of Defects Special Cause vs. Common Cause Variability (repeatability) Accuracy Process not Optimized Root Cause Analysis 5 Whys” Cause and Effect Diagram Process Relationships Incoming Materials Handling Process Problems

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 52

1:30pm CDT

PDC 16: 10 Defect Analysis and Process Troubleshooting: Part 2
PDC16: Defect Analysis and Process Troubleshooting: Part 2

*Phil Zarrow & *Jim Hall, ITM Consulting
Monday, October 15 | 1:30pm — 5:00pm

Course Objectives
We don’t assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design

Topics Covered
Specific Processes General: wrong process, material, etc. Printing Placement Soldering Singulation Coating Mechanical Assembly Testing Specific Defect Examples and Causes Wrong Part Damaged Parts Shorts Opens Poor Wetting Insufficient Contamination New Specific Defects HiP / NWO Graping Pad Cratering CAF Conclusion Questions

Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 52

1:30pm CDT

PDC 17: Ball Grid Array: Design and Assembly of BGAs with Emphasis on Backward Compatibility.
PDC17: Ball Grid Array: Design and Assembly of BGAs with Emphasis on Backward Compatibility.

*Ray Prasad, Ray Prasad Consultancy Group
Monday, October 15 | 1:30pm — 5:00pm

Course Objectives
Ball Grid Array (BGA) is one of many surface mount components but it brings unique challenges in both design and assembly of the mixed assembly products. There is great interest in BGA because it offers so many benefits such as real estate savings, high yield and better electrical performance. Despite these promises, there are many problems in BGA and CSP (Chip Scale Packaging). The need to implement lead free simply compounds the problem due to intentional or unintentional mix of tin lead and lead free components on a mixed assembly board.

This course is based on the latest revision (Jan 2013) of IPC-7095C “Design and Assembly Process Implementation for BGA, Rev C” currently chaired by Ray and his book Surface Mount Technology Principles and Practice.

This is not a theoretical course. It is based on Ray’s years of experience in successfully implementing SMT at Boeing and Intel, and various clients including legal cases related backward compatibility. You will get insight into what to do about backward and forward compatibility issues when you have no choice but to deal with tin-lead and lead free BGA on the same board and want to produce products that improve yield, reduce cost and keep away from legal troubles.

In this course we will also talk about major defects such as pad cratering, head in pillow, as ball drop, smiling and frowning BGA and black pad and champing voids. And you will learn everything you wanted to know about voids but were afraid to ask. We will talk about various types of voids in BGA, their impact and their minimization and acceptance criteria to meet industry standard.

You will also get an insight into the interdependency of design and manufacturing to achieve higher yield, lower cost and faster time to market.

Topics Covered
1. BGA Component Styles: Tin-lead, No Lead and High Lead
2. Industry Standard for BGA Design and Assembly (IPC-7095)
3. Driving Forces for BGA
4. Major Concerns with BGA: Moisture and Warpage
5. BGA Design Rules and Guidelines – Impact of ball size, pitch and I/O count
6. BGA Assembly Processes: Issues and Answers
Printing and Reflow Profiling Guidelines
7. Backward & Forward Compatibility Issues and role of selective laser reflow
8. Impact of Lead Free on BGA Reliability
9. Various Types of Voids in BGA, their impact, measurement and control
10. Major Types of BGA Defects
Pad cratering, head in pillow, as ball drop, smiling and frowning BGA and black pad and champing voids
11. (BGA Repair
12. Summary

Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 50

1:30pm CDT

PDC 18: Design for Excellence II: Physics of Failure
PDC18: Design for Excellence II: Physics of Failure

*Dock Brown, CRE, DfR Solutions
Monday, September 18 | 1:30pm — 5:00pm

Course Objectives
Physics of Failure (PoF) also known as Reliability Physics, is a science-based approach for achieving Reliability by Design in electronic products. The methodology is based on research into the conditions that cause electronic components and materials to fail. A PoF analysis combines dynamic stress analysis of usage and environmental conditions with failure mechanism models to perform a durability simulation that identifies failure susceptibilities and calculated lifetime reliability behavior.

Topics Covered
General Concepts and Models Fitness for Use Five Pillars of DfX Requirements and Parameter Management Use Conditions Structured Design Process Control Process Capability Conceptual Product Space Model Product Life Expectations Materials and Processes Systems Technology Flow Model Rules vs Tools Material Degradation The Bathtub Curve Conformance Failures Random Failures Wear-out Failures Industry Standards PCB Board Material Selection Case Studies Physics of Failure in Boards Board Materials Board Mounting Internal Board Failure Solder Joint Failures Physics of Failure in Components Semiconductors Ceramic Capacitors Film Capacitors Electrolytic Capacitors Connectors

Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 51

1:30pm CDT

PDC 19: Reliability of Electronics – the Role of Intermetallic Compounds
PDC19: Reliability of Electronics – the Role of Intermetallic Compounds

Jennie Hwang, Ph.D., H- Technologies Group
Monday, October 14 | 1:30pm — 5:00pm

Course Objectives
Intermetallic compounds play an increasingly critical role to the performance and reliability of solder interconnections in the chip level, package level and board level of lead-free electronics. This course covers the relevant and important aspects of intermetallic compounds ranging from scientific fundamentals to practical application scenarios. Intermetallic compounds before solder joint formation, during solder joint formation and after solder joint formation in storage and service will be examined. The course also discusses intermetallics at-interface and in-bulk, as well as the role of PCB surface finish/component coating in relation to intermetallics, in turn, to reliability. The difference between SnPb and Pb-free solder joint in terms of intermetallic compounds, which affects production-floor phenomena and the actual field failure, will be outlined. The course will also address the newer lead-free alloys that were recently introduced to the market. Attendees are welcome to bring their own selected systems for deliberation.

Topics Covered
1. Intermetallic compounds – definition, fundamentals, characteristics
2. Phase diagrams of Pb-free solders in contrast with SnPb
3. Intermetallic compounds in the intrinsic material- Pb-free vs. SnPb
4. Formation and growth during production process and in product service life
5. Intermetallic compounds - at-interface vs. in-bulk
6. Effects from substrate compositions (hybrid module thick film pads, PCB surface finish, component surface coating)
7. Gold embrittlement
8. Different types of intermetallic compounds – effects on solder joint reliability (Ni/Au, Ni/Pd/Au, Ni/Pd, Cu)
9. SAC alloys incorporated with various doping elements – characteristics, performance
10. Effects on failure mode
11. Effects on reliability


Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 40