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Sunday, October 14
 

8:30am CDT

PDC 01: Design and Assembly Process Principles for High Density Flexible and Rigid Flex Circuits
PDC1: Design and Assembly Process Principles for High Density Flexible and Rigid Flex Circuits

Vern Solberg, Solberg Technical Consulting
Sunday, October 14 | 8:30am — 12:00pm

Course Objectives
This tutorial focuses on implementing best design practices for flexible and rigid flex circuits, the study of alternative fabrication methodologies and planning for automated assembly process efficiency. Information presented will include the selection criteria for base materials for flexible circuit applications, alternative fabrication methodologies, SMT component selection and land pattern development, the requirements for documentation and features required to accommodate SMT-on-flex assembly processing.

Course objectives- Furnish design professionals, systems engineers, assembly and test engineering specialists with a thorough understanding of the materials, fabrication process variations and preferred design practices for flexible and rigid-flex circuits. In addition, extensive detail is furnished regarding preparation for automated SMT assembly including guidance in panel planning to best accommodate current assembly process methodologies.

Topics Covered
1. Applications, standards and defining product use environments
2. Flex circuit construction alternatives
3. Flex and Rigid Flex circuit fabrication process variations
4. SMT component selection and land pattern development
5. Specifying base material, plating and coating 6. Assembly process implementation

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 50

8:30am CDT

PDC 02: Jump Start – An Introduction to SMT Process Basics and Troubleshooting - FREE TO ALL ATTENDEES!
**FREE to all attendees!

PDC2: Jump Start – An Introduction to SMT Process Basics and Troubleshooting

Expert Instructors:
•   *Chrys Shea, Shea Engineering Services
•   Tom Foley, ASM Assembly Systems, LLC
•   Fred Dimock, BTU International

In-Person Moderator: Keith Favre, FHP Reps
On-line Moderator: Mike Buetow, Circuits Assembly Magazine

Sunday, October 14| 8:30am — 12:00pm

This free course is open for all to attend. Its objective is to deliver a basic understanding of SMT fundamentals to technical professionals new to the industry, and will be presented by the following subject matter experts.

Can't make it live? Sign up here to attend via webinar:
https://attendee.gotowebinar.com/register/5397047776691614466 

What You Will Learn:
•    Process Basics
•    Troubleshooting Methods
•    SMT Survival Skills

For Three Core SMT Processes:
•    Stencil Printing
•    Placement
•    Reflow

Who Should Attend:
Engineers, technicians, quality personnel who want to:
•    Learn more about SMT assembly
•    Get more uptime on their assembly lines
•    Improve yields on their assembly lines
•    Reinforce the basics before attending more advanced programs at the conference

Topics Covered
SOLDER PASTE PRINTING – Chrys Shea, Shea Engineering Services
1.    Solder Paste Behavior
   1.1.    Properties & characteristics
   1.2.    Behaviors during the printing process
   1.3.    Printability differences between no-clean and water wash, tin-lead and lead-free
2.    Mechanics of the Printing Process
   2.1.    Alignment and gasketing
   2.2.    PCB support
   2.3.    Squeegee or direct print head motion
   2.4.    Paste setup & release
   2.5.    Area ratios and transfer efficiencies
3.    Troubleshooting Process Problems
   3.1.    5-minute system check
   3.2.    Typical defects and likely root causes to investigate

COMPONENT PLACEMENT – Tom Foley, ASM Assembly Systems
4.    Placement Machine Fundamentals
   4.1.    Component Supply
   4.2.    Placement Head & Vision System
   4.3.    Nozzles & Grippers
5.    Placement Machine Software Fundamentals
   5.1.    Placement Program Optimization
   5.2.    Line Changeover Software
   5.3.    Line Productivity Software
6.    Drivers for High Quality Placement

SOLDER REFLOW – Fred Dimock, BTU
7.    Purpose of Solder Reflow
   7.1.    Oven recipe
   7.2.    Profiles
   7.3.    Process Windows
8.    Material Properties
   8.1.    Solder
      8.1.1.    Eutectic
      8.1.2.    Non -eutectic
   8.2.    Flux with a Purpose
9.    Profile shapes
   9.1.    Heating Rate
   9.2.    Soak
   9.3.    Spike
   9.4.    Cooling Rate
10.    Obtaining Profiles

OPEN QUESTION AND ANSWER PERIOD
In-Person Moderator: Keith Favre, FHP Reps
On-line Moderator: Mike Buetow, Circuits Assembly Magazine

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 51

8:30am CDT

PDC 03: The Incredible Shrinking World Of Electronics – Are Traditional DFM, DFR, DFF Methods Obsolete?
PDC3: The Incredible Shrinking World Of Electronics – Are Traditional DFM, DFR, DFF Methods Obsolete?

*Dale Lee, Plexus Corp.
Sunday, October 15 | 8:30am — 12:00pm

Course Objectives
Today’s electronic component packaging technologies of smaller packages (0201/01005/008003), finer lead pitch (0.4/0.35/0.3/…), bottom terminated components (QFN/LGA) and printed circuit board designs (high layer counts, finer lines, via in pad (VIP), increased copper thicknesses, copper routing, …), increased thermal sensitivity, trailing component, fabrication and assembly industry standards have impacted traditional assembly processes with addition of tight solder application, component placement, thermal management and soldering constraints. Using traditional, simplified mass production techniques are not be sufficient to achieve a high-yielding manufacturing process. This presentation will highlight elements of the impacts of these technologies on reliability and yield when not properly addressed in the design/assembly/inspection-test process, impacts of thermal connections on through-hole and surface soldering processes, introduce the elements of design for matched process (DFMP), and provide examples of several opportunities within the DFMP for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching. The concept of manufacturing, test, reliability by design (XBD) will be presented.

Topics Covered
1. Component packaging impacts
2. PCB design impacts and industry standards limitations
3. SMT and PTH solder design impacts
4. Components with thermal management impacts:
Component design
PCB Thermal balance: X, Y and Z axis
Trace routing
Equipment limitation/tolerance
PCB array tolerance
5. Process tooling design
6. Process control impacts
7. Paste volume, thermal shock SMT and PTH, reflow process warpage
8. Cleaning impacts
9. Compatibility issues, low stand-off components

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 52

8:30am CDT

PDC 04: Reflow, Wave and Rework Soldering Process Optimization in Electronics Manufacturing
PDC4: Reflow, Wave and Rework Soldering Process Optimization in Electronics Manufacturing

*Jasbir Bath, Bath Consultancy LLC
Sunday, October 14 | 8:30am — 12:00pm

Course Objectives
The soldering processes for reflow, wave and rework soldering are essential processes to optimize to improve yield and reliability. The course will review reflow, wave and rework soldering materials and processes with a focus on optimization of preheat and soldering temperatures and times. It will cover typical soldering issues which can occur during reflow, wave and rework with a review of profiles which can be used to help address them with a review of board and component temperature ratings. It will discuss interactions with different board and components having different surface finishes in relation to microstructure and reliability for these processes and factors which should be optimized for improved results.

Topics Covered
1. Reflow, Wave and Rework Soldering materials and processes
2. Common Reflow, Wave and Rework Problems
3. Component and Board Temperature Ratings and Component and Board Surface Finishes
4. Microstructure and Reliability
5. Case studies to optimize soldering processes

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 40

8:30am CDT

PDC 05: Tin Whiskers: A 2018 State of the Industry Assessment
PDC5: Tin Whiskers: A 2018 State of the Industry Assessment

*David Hillman. Rockwell Collins
Sunday, October 14 | 8:30am — 12:00pm

Course Objectives
Tin Whiskers were investigated and "solved" in the 1950s so why are we talking about them in 2018? The objective of this tin whisker course is to : (1) Provide a basic understanding of a tin whisker phenomena; (2) Provide data and resources allowing an attendee to create a tin whisker mitigation protocol applicable for their product/use environment; (3) Provide an update of some of the latest industry tin whisker investigations, testing results, and publicized product failures.

Topics Covered
1. Tin Whiskers 101
2. Tin Whisker Mitigations that You Don't Control
3. Tin Whisker Mitigations that You Do Control
4. Current Industry Tin Whisker Investigations

Sunday October 14, 2018 8:30am - 12:00pm CDT
Room 53

1:30pm CDT

PDC 07: Interconnections: PCB and Solder – Not Just Your Normal Failure Modes Any More
PDC 07: Interconnections: PCB and Solder – Not Just Your Normal Failure Modes Any More

*Dale Lee, Plexus Corp.
Sunday, October 15 | 1:30pm — 5:00pm

Course Objectives
Design densities for electronic assemblies have increased the interconnection density of PCB’s and component solder connections. This increase density has resulted in smaller via diameters for traditional and micro via hole, complex via structures, terminations of via holes into component mounting pads, decreased component mounting pads and increased diversity of routing terminations to component lead pads. This complexity in interconnection and density of interconnections combined with decreasing component lead pitches and lagging development of industry standards to address these changes has created opportunities for new PCB and solder joint formation failure modes.

As technology continues to march forward, new interconnection failure modes will continue to develop. This presentation will review many of the new PCB interconnection/PCB to solder joint/solder joint failure modes and methods for identification of potential failures/reliability and some recommended potential design/assembly process solutions.

Topics Covered
*TBD

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 52

1:30pm CDT

PDC 08: Printing and Its Affect on Manufacturing Yield
PDC8: Printing and Its Affect on Manufacturing Yield

*Jasbir Bath, Bath Consultancy LLC
Sunday, October 14 | 1:30pm — 5:00pm

Course Objectives
The printing process is one of the most critical processes to optimize to improve manufacturing yield. The course will review stencil aperture requirements of a variety of components, stencil thicknesses, types of stencils, the printing process, printing DOEs, and solder paste use and selection in order to understand the key factors which need to be optimized for successful printing.

Topics Covered
1. Printing Processes and Stencil Types/ Guidelines
2. Common Printing Problems
3. Solder paste material types
4. Stencil design
5. Print DOEs
6. Component Trends
7. Case studies for optimizing print volumes to reduce defects such as Head-in-Pillow

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 40

1:30pm CDT

PDC 09: New Developments in Selective Soldering Technology
PDC9: New Developments in Selective Soldering Technology

Bob Klenke, ITM Consulting
Sunday, October 14 | 1:30pm — 5:00pm

Course Objectives
Selective soldering technology is playing an increasingly critical role in the assembly and reliability of solder interconnections within mixed-technology printed circuit board assemblies. This course reviews new developments in selective soldering technology and outlines their impact upon the electronic assembly landscape. This workshop is based on real-world consulting experience with selective soldering processes procedures and techniques. Best practices together with potential solutions for improving manufacturing yields and reliability will be discussed in detail.

Topics Covered
1. Automatic fiducial location and skew correction • Automatic board warpage compensation
2. Advanced drop-jet flux deposition
3. In-process flux verification
4. Mitigation of no-clean flux residues
5. Dual solder nozzle functionality and benefits
6. Integrated wave soldering capability and advantages
7. Ultra-fine pitch selective soldering
8. Graphics-based programming advanced parameters
9. Advances in solder nozzle design
10. Traceability and data logging compatibility with FIS and Industry 4.0 protocols
11. AOI solder joint inspection methodologies
12. Automatic solder nozzle cleaning and solder nozzle tinning methods
13. High-volume, high-performance soldering
14. Simultaneous parallel and independent double processing modes
15. Variable center distance soldering of multi-up panels
16. On-the-fly continuous motion selective soldering

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 53

1:30pm CDT

PDC 10: Solder Paste Qualification Using the SMTA Miniaturization Test Vehicle
PDC10: Solder Paste Qualification Using the SMTA Miniaturization Test Vehicle

*Chrys Shea, Shea Engineering Services
Sunday, October 14 | 1:30pm — 5:00pm

Course Objectives
This brand-new, half-day workshop focuses on solder paste and how to select the best one for an operation using the new SMTA Miniaturization Test Vehicle. Solder pastes have over 20 individual characteristics that must be considered during the selection process. Moreover, some characteristics conflict with each other and the tradeoffs must be carefully considered when determining the best process chemistry in order to avoid surprises on the production line. Many operations delay updating their soldering materials because of the high cost, lost production time, and complexity of the materials. These concerns have been met with a low-cost evaluation kit that minimizes line time, maximizes test efficiency, and demonstrates the tradeoffs in performance characteristics. The kit includes pre-designed PCB boards and components; an active spreadsheet to configure the PCB population, cost and sample sizes; stencil and vacuum board support designs; ODB++ database; placement files; SPI files; step-by-step directions for a 30-print DOE; an SMT soldering reference manual; directions for statistical reduction; and the customizable Score Card, which helps assemblers understand the tradeoffs involved and chose the best possible product. The hardware for the kit is available for purchase from commercial suppliers; the documentation and user files are available for FREE download from a website. This course discusses each characteristic of solder paste, how it impacts the SMT process, how the kit tests it, and how and why the board was designed. The Score Card is the key to customizing the test to a specific operation. Attendees will be encouraged to consider the solder paste characteristics on the Score Card as it relates to their SMT operations in an open discussion forum.

Topics Covered
1. Kit Overview
2. Solder Paste Characteristics
2.1.Categories and details
3. PCB Design
3.1.Top Side Elements
3.2.Bottom Side Elements
4. Components
4.1.Size Range
4.2.Cost Range
4.3.Bill of Materials Configurator Spreadsheet
5. Nesting the Tests for Efficiency
5.1.One side sits for abandon test while the other side gets worked in a shear test
6. Test Execution Order
6.1.Top Side
6.2.Bottom Side
6.3.Bottom Side
6.4.Top Side
7. Data Collection and Reduction
7.1.Print
7.2.Reflow
8. Score Card
8.1.Weighting each factor on importance to the specific operation and open discussion
8.2.Ranking each paste’s performance relative to each other
8.3.Category subtotals - Tradeoffs
8.4.Overall score
9. Fatal Flaws
9.1.Graping
9.2.Voiding
9.3.Peaking
9.4.Wipe Sensitivity
9.5.Other
10. Other uses for the SMTA MTV
11. Q&A

Sunday October 14, 2018 1:30pm - 5:00pm CDT
Room 51
 
Monday, October 15
 

8:30am CDT

HE1: Predicting Component Life for Harsh Environments
Chair: Sa'd Hamasha, Ph.D., Auburn University
Co-Chair: David Reitz, INVENTEC Performance Chemicals USA

>>Second Round Robin Evaluation of iNEMI Creep Corrosion Qualification Test
*Prabjit Singh, Ph.D., Haley Fu, Dem Lee, Jeffrey Lee, Karlos Guo, Jane Li, Simon Lee, Geoffrey Tong, Chen Xu, IBM Corporation

>>Process and Materials Interaction Investigation: Test Methods for Electrochemical Consistency in PCB Assembly Processes - Revisited
Brook Sandy-Smith, Erron Pender, Adam Murling, Indium Corporation

>>Testing and Mitigating Resistor Silver Sulfide Corrosion
Pamela Lembke, *Marie Cole, Jacob Porter, Tim Tofil, Jason Wertz, IBM Corporation; Jim Wilcox, Mike Gaynes, Mike Meilunas, Universal Instruments Corporation; Holly Rubin, Nokia 

Monday October 15, 2018 8:30am - 10:00am CDT
Room 48

8:30am CDT

TI1: Smart Manufacturing for Electronics
Chair: Trevor Galbraith, Global SMT & Packaging
Co-Chair: *Gregory Vance, Rockwell Automation

>>An Overview of Smart Manufacturing in the IoT Era. Challenges and Solutions
Glen Farris, Universal Instruments

>>How Do I Get Smart With IPC CFX?
Michael Ford, Aegis Software

>>Smart Manufacturing In The Electronics Industry—Realizing The Digital Factory Vision
Oren Manor, Mentor Graphics, a Siemens Business

Monday October 15, 2018 8:30am - 10:00am CDT
Room 46

8:30am CDT

PDC 11: Design and Assembly Process Challenges for Bottom Terminations Components (BTCs) such as QFN, DFN and MLF in Tin-Lead & Lead Free World
PDC11: Design and Assembly Process Challenges for Bottom Terminations Components (BTCs) such as QFN, DFN and MLF in Tin-Lead & Lead Free World.

*Ray Prasad, Ray Prasad Consultancy Group
Monday, October 15 | 8:30am — 12:00pm


Course Objectives
Bottom Termination surface mount Components (BTCs) go by various names such as QFN, DFN, SON, LGA, MLP, and MLF, which utilize surface to surface interconnections. BTCs are like BGAs which also have hidden terminations, but they are also very different. BTCs do not have spheres but rather metallized terminations or pads underneath the package. This minor difference in the physical I/O shape makes all the difference in design, assembly and rework between BTCs and BGAs.
Since there are no leads or balls in BTCs to take up any slack from package or board warpage, you essentially need perfection in design and assembly process. When was the last time you saw every thing perfect on any manufacturing floor?
One must also keep in mind that these parts are not the only components that must be mounted on the board. Look at any board. It will have other packages such as BGAs, fine pitch and even some through-hole components; and those components have their own unique design and assembly implementation requirements. So designing for BTCs may involve trial and error and lot of frustration by many companies. Additional frustration is caused by fast-paced changes in packaging technologies and the advent of Lead Free has compounded the designer’s task.
When it comes to inspection, BTCs pose even more challenge than BGAs. What you may see in visual inspection may look bad but may really be acceptable. And what you don’t or can’t see may really be critical. And the fact that the Process Engineer must worry about both too much solder and too little solder on the same BTC package makes the quality engineer nervous about field returns.
The objective of the course is to get away from the trial and error approach and provide you successful design and process practices commonly used by the industry. This course will cover the practical details of BTC design and assembly processes.
This course is based on Surface Mount Technology: Principles by Ray Prasad and Practice and IPC 7093 Design and Assembly Process Guidelines for BTCs also co-chaired Ray. This course identifies many of the characteristics that influence the successful implementation of robust and reliable BTC assembly processes.
This is not a theoretical course. It s based on Mr. Prasad's over two decades of experience at Boeing, Intel and numerous clients and deals with "real-world" problems in lead free and tin-lead BTC implementation.

Topics Covered
1. Introduction
Pros and Cons of BTC
Pull Back Vs Non Pull Back
BTC Package Manufacturing Process
2. Major Design Considerations for BTCs
Laminates and Surface Finish Considerations
Land Pattern and Stencil Design Guidelines
Component considerations
3. Assembly Process Guidelines for BTC
Solder Paste Printing- the Key Process Step
Reflow Process Guidelines
BTC Solder Joint Quality Requirements
BTC Rework Process
4. Key strategies in design and manufacturing processes to prevent field returns

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 50

8:30am CDT

PDC 12: Achieving High Reliability for Lead-Free Solder Joints - Materials Consideration
PDC12: Achieving High Reliability for Lead-Free Solder Joints - Materials Consideration

*Ning- Cheng Lee, Ph.D., Indium Corporation
Monday, October 15 | 8:30am — 12:00pm

Course Objectives
This course covers the detailed material considerations required for achieving high reliability for lead-free solder joints. The reliability discussed includes joint mechanical properties, development of type and extent of intermetallic compounds (IMC) under a variety of material combinations and aging conditions and how those IMCs affect the reliability. The failure modes, thermal cycling reliability, and fragility of solder joints as a function of material combination, thermal history, and stress history will be addressed in details, and novel alloys with reduced fragility will be presented. Electromigration, corrosion, and tin whisker will also be discussed. The emphasis of this course is placed on the understanding of how the various factors contributing to the failure modes, and how to select proper solder alloys and surface finishes for achieving high reliability. Also will be presented are the desirable future alloys and fluxes in order to meet the challenge of miniaturization.

Topics Covered
1. Implementation Status
2. Prevailing Materials
1) Prevailing Solder Alloys
2) Prevailing Surface Finishes
3. Surface Finishes Issues
1) Issues of ENIG
2) Issues of ImAg
4. Mechanical Properties
1) Shear & Pull Strength
2) Creep
5. Intermetallic Compounds
1) Interaction of Cu and Ni
2) Effect of Cu Content in SAC
3) Effect of Ni in Cu Pad
4) Effect of Alloy Additives
5) Effect of Heat History
6) Formation of Interfacial Void
6. Failure Modes
1) Grain Boundary Sliding & Cavitation
2) Grain Coarsening
3) Grain Orientation
4) Lead Contamination
5) Mixed Alloys
6) Interfacial Voiding
7. Thermal Cycle Reliability
1) Effect of Thermal Cycle Test Condition
2) Effect of PCB Surface Finish Cu vs Ni
3) Effect of Reflow Temperature
4) Reliability of Reworked SMT Joints
8. Reliability of Through-Hole Joints
1) Large and Thick Board
2) Partially Filled Through-Hole
9. Fragility
1) Fragility of Lead-Free Solder Joints
2) Effect of Component Finish
3) Effect of Alloy, PCB Surface Finish, Reflow History, and Strain Rate
4) Effect of IMC Thickness
5) Effect of Isothermal Aging
6) Effect of Thermal Cycling
7) Effect of Intermetallic Morphology
8) Novel Alloys with Reduced Fragility
10. Reliability – Electromigration
1) Influence of Electromigration and Temperature on Resistance
2) Effect of Current Density & Back Stress on IMC Thickness
3) Effect of Current on IMC Thickness, Joint Temp and Strain
4) Effect of Electromigration on Mechanical Property
5) Effect of Cu UBM Thickness on Electromigration
11. Reliability – Corrosion
1) SAC405
2) Corrosion Resistance of PWB Finishes
12. Tin Whisker

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 53

8:30am CDT

PDC 13: Solder Joint Reliability – Principles and Applications
PDC13: Solder Joint Reliability – Principles and Applications

Jennie Hwang, Ph.D., H- Technologies Group
Monday, October 14 | 8:30am — 12:00pm

Course Objectives
The course emphasizes on practical, working knowledge, yet balanced and substantiated with science by outlining solder joint reliability fundamentals in fatigue and creep damage mechanisms via ductile, brittle, ductile-brittle fracture, and by discussing the critical “players” of solder joint reliability (e.g., manufacturing process, PCB/component coating surface finish, solder alloys). Likely solder joint failure modes of interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced and surface cracks will be illustrated. To withstand harsh environments, the strengthening metallurgy to further increase fatigue resistance and creep resistance, and the power of metallurgy and its ability to anticipate the relative performance will be illustrated by discussing the comparative performance vs. metallurgical phases and microstructure. The question on whether a life-prediction model can assure reliability will be discussed. A relative reliability ranking among commercially available solder systems, as well as the scientific, engineering and manufacturing reasons behind the ranking will be outlined. Attendees are encouraged to bring their own selected systems for deliberation.

Topics Covered
1. Premise – reliability, solder joint thermo-mechanical degradation – fatigue and creep interaction
2. Solder joint failures modes - interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced, surface-crack, and others
3. Solder joint failure mechanisms – ductile, brittle, ductile-brittle transition fracture
4. Solder joint strengthening metallurgy
5. Illustration of microstructure evolution vs. strengthening in Sn Cu+x,y,z and SnAgCu+x,y,z systems
6. Solder joint voids vs. reliability - causes, effects, criteria
7. Solder joint surface-crack –causes, effects
8. Distinctions and commonalties between Pb-free and SnPb solder joints
9. Thermal cycling conditions - effects on test results and test results interpretation
10. Testing solder joint reliability – discriminating tests and discerning parameters
11. Life-prediction model vs. reliability
12. Solder joint performance in harsh environments
13. What solder alloys are on the horizon and what impact will be on reliability
14. Best practices and competitive manufacturing
15. Ultimate reliability


Monday October 15, 2018 8:30am - 12:00pm CDT
Room 40

8:30am CDT

PDC 14: Weeding Out PCB Fabrication Defects Before Assembly:
PDC14: Weeding Out PCB Fabrication Defects Before Assembly:

Bihari Patel, Bihari Patel SMT Connection
Monday, October 15 | 8:30am — 12:00pm

Course Objectives
With the Lead Free transition and green revolution changes completed at Assemblers and Fabricators to meet demands of higher densities for Printed Circuit Boards presenter will share his experiences. Global sourcing of PCBs is a reality with larger batch quantities, to prevent line stoppage and expensive rework, it is important that emphasis be placed on PCBs prior to assembly to highlight issues and prevent future issues prior to use. Ensuring quality PCBs are entering in the assembly process, resulting in higher first pass yield and reduced rework associated with PCB quality deficiency. This workshop will highlight any deficiency in PCB fabrication and ones following best practices will be exhibit their strengths against other fabricators. Will also cover key result areas in Assembly Process and Metal Core - LED PCBs their assembly challenges.

Topics Covered
1. Lead Free and Leaded assembly of circuit boards showing defects experienced related to PCB fabrication.
2. 101 of PCB Fabrication for Contract Electronic Manufacturing and Original Equipment Manufacturer
3. Process Control and applicable specifications for outgoing quality.
4. Descriptions with examples of applicable test methods, including reference to IPC documentation
5. Top twenty defects will be highlighted and with emphasis on how to detect, report and get corrective actions for prevention.
6. Fabricator selection, source Inspection and ongoing preferred fabricator audits
7. Case Studies
8. Metal Core - LED PCBs and assembly challenges

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 51

8:30am CDT

PDC 15: Defect Analysis and Process Troubleshooting: Part 1
PDC15: Defect Analysis and Process Troubleshooting: Part 1

*Phil Zarrow & *Jim Hall, ITM Consulting
Monday, October 15 | 8:30am — 12:00pm

Course Objectives
We don’t assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design

Topics Covered
Introduction Prevention: Process Development and Validation Variation (Common Cause) Continuous Improvement Defect Definition Failure Reduced Reliability Process Indicator Special Cause vs. Common Cause Defect Identification Inspection Manual AOI X-Ray Test ICT Functional Contamination False Calls / Escapes Causes of Defects Special Cause vs. Common Cause Variability (repeatability) Accuracy Process not Optimized Root Cause Analysis 5 Whys” Cause and Effect Diagram Process Relationships Incoming Materials Handling Process Problems

Monday October 15, 2018 8:30am - 12:00pm CDT
Room 52

10:30am CDT

HE2: Reliability of Lead-Free Solder Alloys in Automotive Environment

Chair: *Babak Arfaei, Ph.D., Ford Motor Company
Co-Chair: Keith Howell, Nihon Superior Co.

>>Developing Pb-Free Solders for Harsh Environment Applications
*Mehran Maalekian, Ph.D., AIM Solder

>>Effect of Component Density on Sn-3.0Ag-0.5Cu Solder Joint Reliability Under Harsh Environment
Won Sik Hong, Jinju Yu, Chulmin Oh , Korea Electronics Technology Institute(KETI)

>> Effects of Mixing Solder Sphere Alloys with Bismuth-Based Pastes on the Component Reliability in Harsh Thermal Cycling
Francy John Akkara, Mohammed Abueed, Sa’d Hamasha, Ph.D., Jeff Suhling, Ph.D., Pradeep Lal, Ph.D., Auburn University 

Monday October 15, 2018 10:30am - 12:00pm CDT
Room 48

10:30am CDT

TI2: Industry 4.0: Why Do We Need It?
Chair: *Marie Cole, IBM Corporation
Co-Chair: Roy Starks, Libra Industries

>>iNEMI Industry 4.0 Roadmap
Ranjan Chatterjee, Cimetrix; Dan Gamota, Jabil;

>>ReMAP Industry 4.0
Workshop/Education Initiatives

Irene Sterian, P.E., Celestica Inc.

>>Panel Discussion
Moderator: Trevor Galbraith, Global SMT & Packaging

Panelists:
Dan Gamota, Jabil
Ranjan Chatterjee, Cimetrix
Irene Sterian, P.E., Celestica, Inc.
*Gregory Vance, Rockwell Automation



Monday October 15, 2018 10:30am - 12:00pm CDT
Room 46

12:30pm CDT

TI Keynote Lunch - The Connected Enterprise - Make Smart Manufacturing Work for You
Chair: *Matt Kelly P.Eng, MBA, IBM Corporation

The Connected Enterprise - Make Smart Manufacturing Work for You
Bob Murphy, Rockwell Automation

*Box lunches are provided so you must pre-register to get a lunch. 
**This session is now full, but you can still indicate if you want to be added to a waitlist and you will be contacted if space becomes available.

Monday October 15, 2018 12:30pm - 1:30pm CDT
Room 46

1:30pm CDT

HE3: New Materials and Methods for Electronic Products in Harsh Environments
Chair: Robert Kinyanjui, Ph.D., John Deere Electronic Solutions, Inc.
Co-Chair: *Raiyo Aspandiar, Ph.D., Intel Corporation

>>How Wet is Wet – Robust Automotive Electronics in Humid Environment
*Lothar Henneken, Daniel Markus, Daniel Koenig , Robert Bosch GmbH

>>ASEP (Application Specific Electronics Package) A Next Generation Electronics Manufacturing Technology
Victor Zaderej, Richard Fitzpatrick,  Molex

>> Fatigue and Shear Properties of High Reliable Solder Joints for Harsh Applications
Su Sinan, Minghong Jian, Francy John Akkara, Mohammed Abueed, Sa’d Hamasha, Ph.D., Jeff Suhling, Ph.D., Pradeep Lal, Ph.D.,  Auburn University

Monday October 15, 2018 1:30pm - 3:00pm CDT
Room 48

1:30pm CDT

Women's Leadership Program: Presentations
FREE for all attendees!

Chair: Priyanka Dobriyal Ph.D., Intel Corporation
Co-Chair: Elizabeth Benedetto, HP Inc.

>>Optics and Electronics
Irene Sterian, P.E., Celestica Inc.

>>"WIT at RIT” - Women in Technology & Is Photonics Integration in our Future?
*Martin Anselm, Ph.D., Rochester Institute of Technology (RIT)

>>Be Yourself: Getting Ahead by Being a Woman in a Man's World
Karyn Ross, Karyn Ross Consulting

Monday October 15, 2018 1:30pm - 3:00pm CDT
Room 47/49

1:30pm CDT

PDC 16: 10 Defect Analysis and Process Troubleshooting: Part 2
PDC16: Defect Analysis and Process Troubleshooting: Part 2

*Phil Zarrow & *Jim Hall, ITM Consulting
Monday, October 15 | 1:30pm — 5:00pm

Course Objectives
We don’t assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design

Topics Covered
Specific Processes General: wrong process, material, etc. Printing Placement Soldering Singulation Coating Mechanical Assembly Testing Specific Defect Examples and Causes Wrong Part Damaged Parts Shorts Opens Poor Wetting Insufficient Contamination New Specific Defects HiP / NWO Graping Pad Cratering CAF Conclusion Questions

Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 52

1:30pm CDT

PDC 17: Ball Grid Array: Design and Assembly of BGAs with Emphasis on Backward Compatibility.
PDC17: Ball Grid Array: Design and Assembly of BGAs with Emphasis on Backward Compatibility.

*Ray Prasad, Ray Prasad Consultancy Group
Monday, October 15 | 1:30pm — 5:00pm

Course Objectives
Ball Grid Array (BGA) is one of many surface mount components but it brings unique challenges in both design and assembly of the mixed assembly products. There is great interest in BGA because it offers so many benefits such as real estate savings, high yield and better electrical performance. Despite these promises, there are many problems in BGA and CSP (Chip Scale Packaging). The need to implement lead free simply compounds the problem due to intentional or unintentional mix of tin lead and lead free components on a mixed assembly board.

This course is based on the latest revision (Jan 2013) of IPC-7095C “Design and Assembly Process Implementation for BGA, Rev C” currently chaired by Ray and his book Surface Mount Technology Principles and Practice.

This is not a theoretical course. It is based on Ray’s years of experience in successfully implementing SMT at Boeing and Intel, and various clients including legal cases related backward compatibility. You will get insight into what to do about backward and forward compatibility issues when you have no choice but to deal with tin-lead and lead free BGA on the same board and want to produce products that improve yield, reduce cost and keep away from legal troubles.

In this course we will also talk about major defects such as pad cratering, head in pillow, as ball drop, smiling and frowning BGA and black pad and champing voids. And you will learn everything you wanted to know about voids but were afraid to ask. We will talk about various types of voids in BGA, their impact and their minimization and acceptance criteria to meet industry standard.

You will also get an insight into the interdependency of design and manufacturing to achieve higher yield, lower cost and faster time to market.

Topics Covered
1. BGA Component Styles: Tin-lead, No Lead and High Lead
2. Industry Standard for BGA Design and Assembly (IPC-7095)
3. Driving Forces for BGA
4. Major Concerns with BGA: Moisture and Warpage
5. BGA Design Rules and Guidelines – Impact of ball size, pitch and I/O count
6. BGA Assembly Processes: Issues and Answers
Printing and Reflow Profiling Guidelines
7. Backward & Forward Compatibility Issues and role of selective laser reflow
8. Impact of Lead Free on BGA Reliability
9. Various Types of Voids in BGA, their impact, measurement and control
10. Major Types of BGA Defects
Pad cratering, head in pillow, as ball drop, smiling and frowning BGA and black pad and champing voids
11. (BGA Repair
12. Summary

Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 50

1:30pm CDT

PDC 18: Design for Excellence II: Physics of Failure
PDC18: Design for Excellence II: Physics of Failure

*Dock Brown, CRE, DfR Solutions
Monday, September 18 | 1:30pm — 5:00pm

Course Objectives
Physics of Failure (PoF) also known as Reliability Physics, is a science-based approach for achieving Reliability by Design in electronic products. The methodology is based on research into the conditions that cause electronic components and materials to fail. A PoF analysis combines dynamic stress analysis of usage and environmental conditions with failure mechanism models to perform a durability simulation that identifies failure susceptibilities and calculated lifetime reliability behavior.

Topics Covered
General Concepts and Models Fitness for Use Five Pillars of DfX Requirements and Parameter Management Use Conditions Structured Design Process Control Process Capability Conceptual Product Space Model Product Life Expectations Materials and Processes Systems Technology Flow Model Rules vs Tools Material Degradation The Bathtub Curve Conformance Failures Random Failures Wear-out Failures Industry Standards PCB Board Material Selection Case Studies Physics of Failure in Boards Board Materials Board Mounting Internal Board Failure Solder Joint Failures Physics of Failure in Components Semiconductors Ceramic Capacitors Film Capacitors Electrolytic Capacitors Connectors

Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 51

1:30pm CDT

PDC 19: Reliability of Electronics – the Role of Intermetallic Compounds
PDC19: Reliability of Electronics – the Role of Intermetallic Compounds

Jennie Hwang, Ph.D., H- Technologies Group
Monday, October 14 | 1:30pm — 5:00pm

Course Objectives
Intermetallic compounds play an increasingly critical role to the performance and reliability of solder interconnections in the chip level, package level and board level of lead-free electronics. This course covers the relevant and important aspects of intermetallic compounds ranging from scientific fundamentals to practical application scenarios. Intermetallic compounds before solder joint formation, during solder joint formation and after solder joint formation in storage and service will be examined. The course also discusses intermetallics at-interface and in-bulk, as well as the role of PCB surface finish/component coating in relation to intermetallics, in turn, to reliability. The difference between SnPb and Pb-free solder joint in terms of intermetallic compounds, which affects production-floor phenomena and the actual field failure, will be outlined. The course will also address the newer lead-free alloys that were recently introduced to the market. Attendees are welcome to bring their own selected systems for deliberation.

Topics Covered
1. Intermetallic compounds – definition, fundamentals, characteristics
2. Phase diagrams of Pb-free solders in contrast with SnPb
3. Intermetallic compounds in the intrinsic material- Pb-free vs. SnPb
4. Formation and growth during production process and in product service life
5. Intermetallic compounds - at-interface vs. in-bulk
6. Effects from substrate compositions (hybrid module thick film pads, PCB surface finish, component surface coating)
7. Gold embrittlement
8. Different types of intermetallic compounds – effects on solder joint reliability (Ni/Au, Ni/Pd/Au, Ni/Pd, Cu)
9. SAC alloys incorporated with various doping elements – characteristics, performance
10. Effects on failure mode
11. Effects on reliability


Monday October 15, 2018 1:30pm - 5:00pm CDT
Room 40

2:00pm CDT

TI3: Blockchain and Predictive Field Reliability
Chair: *Tom Forsythe, KYZEN Corporation
Co-Chair:

>>Blockchain Technology for the High-Tech Industry
Quentin Samelson, IBM Corporation

>>Synergy Between Smart Manufacturing & The Secure Supply Chain
​​​​Michael Ford, Aegis Software

Monday October 15, 2018 2:00pm - 3:00pm CDT
Room 46

3:30pm CDT

HE4: Improving Manufacturing Process To Provide Better Survivability of Electronic Products
Chair: *Iulia Muntele, Ph,.D., Sanmina Corporation
Co-Chair: Sa'd Hamasha, Ph.D., Auburn University

>>Reducing Spatter in Flux Cored Solder Wires for Robotic Soldering Applications
  Geoffrey Post, Arturo Espejo, Olga Spaldon-Stewart, Kyle Loomis, Kester

>>The Effectiveness of 75% IPA/25% DI Extraction Solution on No-Clean Flux Residues
*Mike Bixenman, DBA, KYZEN Corporation; David Lober, Marietta Lemieux, *Mark McMeen, STI Electronics

>>Improved Condensation Testing to Evaluate Protection Performance of Conformal Coatings Under Different Condensation Levels
*Martin Wickham, Ph.D., Ling Zou, National Physical Laboratory

Monday October 15, 2018 3:30pm - 5:00pm CDT
Room 48

3:30pm CDT

TI4: Additive Manufacturing (3D Printing) for Electronic Circuitry

Chair: Gary Tanel, Libra Industries
Co-Chair: Carol Primdahl, Krypton Solutions

>>Fully Printed 3D Interconnects: Reducing Semiconductor Package Size and Reducing Manufacturing Complexity
Bryan Germann, Optomec, Inc.

>>3D Printing of Multilayer PCBs and Non-Planar Circuitry
Simon Fried, Nano Dimension USA

>>Direct Digital Manufacturing for 3D Electronic Packaging
Ken Church, nScrypt

Monday October 15, 2018 3:30pm - 5:00pm CDT
Room 46

3:30pm CDT

Women's Leadership Program: Table Topics Group Discussion
FREE for all attendees!

Moderators: Marie Cole, IBM; Michelle Michelle Ogihara, FLITE US Ambassador

Recognizing Your Own Leadership Qualities
Hosted by *Martin Anslem, Ph.D., Rochester Institute of Technology (RIT)

How to Relentlessly Reinvent Yourself
Hosted by Karyn Ross, Karyn Ross Consulting

Efficient Networking
 Hosted by Lenora Clark, MacDermid Enthone

Work and Life Integration
 Hosted by *Bill Barthel, Plexus Corp.

Unconscious Biases: Real Actions to Overcome
Hosted by Elizabeth Bennedetto, HP, Inc.

Capitalizing on the Silver Tsunami
Hosted by *Chrys Shea, Shea Engineering Services

The Technical vs Management Career Path
Hosted by *Srinivas Chada, Stryker

Monday October 15, 2018 3:30pm - 5:00pm CDT
Room 47/49

5:00pm CDT

Women’s Leadership Connection Reception
FREE for all attendees!

Relax & Unwind!
Get to know your colleagues after the Women's Leadership Program at our annual Connection Reception while enjoying complimentary wine and appetizers from 5:00pm - 6:00pm!

Monday October 15, 2018 5:00pm - 6:00pm CDT
Room 47/49
 
Tuesday, October 16
 

8:00am CDT

Dual Keynote Presentation and SMTA Annual Meeting

Tuesday, October 16 | 8:00am -10:00am

FREE to All Attendees!

>>The World's Most Advanced Fighter Jet Helmet - from Development and Production to the Fight
Scott “Shark” McLaren, F-35 Pilot, Lockheed Martin
Ron Heberlein, Pr. Program Manager, Rockwell Collin
s

The F-35 Lightning II is a 5th Generation fighter, combining advanced stealth with fighter speed and agility, fully fused sensor information displayed to the pilot through the Helmet Mounted display (HMD), network-enabled operations and advanced sustainment. Lockheed Martin is the prime contractor, continuing its 100-year history of aircraft research and design with the Lightning II. Rockwell Collins – ESA Vision Systems is the supplier of the HMD, the industry leader in development of helmet mounted display technology for the last 33 years. According to standard industry accepted economic forecasting, the F-35 is responsible for more than 125,000 direct and indirect jobs, making it the single largest job generator in the Department of Defense program budget. The Lockheed Martin F-35 program teams with more than 1,400 domestic suppliers in 46 states and Puerto Rico to produce thousands of components from highly sophisticated radar sensors to the aircraft’s mid fuselage. This exciting presentation will provide an overview of the development of the F-35 HMD, and how pilots use the unparalleled capabilities that the HMD provides.


Tuesday October 16, 2018 8:00am - 10:00am CDT
Room 21/22

10:00am CDT

Electronics Exhibition
Many of the 170 exhibiting companies will bring working equipment that you can see for yourself.

Spotlight Sessions:
Attend Free Technical Sessions in the Exhibit Hall Theater!

Free Activities on the Show Floor:
>>Poster Session Tuesday, October 16 @ 12pm
>>Tech Tours Tuesday, October 16 & Wednesday, October 17
>>Metallographic Photo Contest Display Tuesday, October 16 & Wednesday, October 17
>>Career Center Tuesday, October 16 & Wednesday, October 17
>>Appreciation Reception Wednesday, October 17 @ 3:30pm

Tuesday October 16, 2018 10:00am - 5:00pm CDT
Exhibit Hall

11:00am CDT

APT1: Trends in Advanced Packaging / 3D Interconnects
Chair: *Andrew Mawer, NXP Semiconductors
Co-Chair: Sue Teng, Cisco

>>Evaluation of High Speed Plating for Copper Post with Flat Top Shape and Improved Post Height Uniformity
Yuki Itakura, Shinji Tachibana; Hisamitsu Yamamoto; Shigeo Hashimoto, C. Uyemura & Co., Ltd.

>>Metallization of Glass Interposers
*Charles Woychik, Ph.D., John Lauffer, David Bajkowski, Michael Gaige, Robert Edwards, Gordon Benninger, William Wilson, i3 Electronics

>>Development of High Density Interconnect Technologies for Panel Level Packaging
*Lars Boettcher, Ph.D., Fraunhofer IZM


Tuesday October 16, 2018 11:00am - 12:30pm CDT
Room 44

11:00am CDT

FSA1: Solder Paste Development to Overcome Component Challenges
Chair: Ursula Marquezdetino, Plexus Corp.
Co-Chair: Adam Murling, Indium Corporation

>>Robust SMT No-Clean Solder Paste for SiP and 01005 Assembly
*Ning-Cheng Lee, Ph.D., Xiaoqin Lu, Fen Chen, Indium Corporation

>>The Influence of Aspects of Solder Paste Formulation and Soldering Process Factors on Voiding Under Large QFN Devices
Mathew Jones, Henkel; Tamara Goas-Fernandez; Barry Wenham

>>Rheology and Wetting Characterizations of Flux and Solder Paste for BGA Packages
Jinlin Wang, Intel Corporation

Tuesday October 16, 2018 11:00am - 12:30pm CDT
Room 49

11:00am CDT

MFX1: Solder Printing
Chair: *Raymond Lawrence, General Microcircuits Inc.
Co-Chair:  Ivan Roman, Continental Corporation

>>Rational Application of Impractical Stencil Aperture Designs to Enable M0201 Heterogeneous Assembly
*Jeff Schake, Mark Whitmore, ASM Assembly Systems

>>Impact of Stencil Quality & Technology on Solder Paste Printing Performance
Jonas Sjoberg, Jeffrey Len Yung Kwuan, Leon Rao, Evan Yip, Wisdom Qu, Indium Corporation, Asia-Pacific

>>Evaluating the Next Generation of Stencil Stepping Technologies
Greg Smith, Blue Ring Stencils; Chrys Shea , Shea Engineering Services

Tuesday October 16, 2018 11:00am - 12:30pm CDT
Room 46

11:00am CDT

SUB1: Electroless Nickel Immerison Gold Processing Considerations
Chair: *Don Banks, Abbott
Co-Chair: Mark Fulcher, Continental Automotive

>>A Novel Electroless Nickel/Immersion Gold (ENIG) Surface Finish for Better Reliability of Electronic Assemblies
Kunal Shah, Ph.D., LiloTree

>>Can a Cyanide Free Immersion Gold Bath be a Viable Option in the Existing Final Finish Production Environments?
Rick Nichols, Sandra Heinemann, Atotech Deutschland GmbH

>>Effects of ENIG Nickel Corrosion on Wetting Balance Test Results and Intermetallic Formation
*George Milad, *Donald Gudeczauskas, Albin Gruenwald, Uyemura International Corporation

Tuesday October 16, 2018 11:00am - 12:30pm CDT
Room 48

11:00am CDT

Spotlight 1
FREE for all attendees on the expo show floor!

Chair: *William Capen, Honeywell FM&T

Presenting at 11:00 AM
>>Strain Energy Model for Underfill
*Reza Ghaffarian, Ph.D., Jet Propulsion Laboratories

Presenting at 11:30 AM
>>Solder Paste: Fundamental Material Property / SMT Performance Correlation for NWO, HnP, Solder Bridging and Printability
Nilesh Badwe, Intel Corporation

Presenting at 12:00 PM
>>The Role of Nickel in Solder Alloys - Part 1. The Effect of Ni on the Behavior of Sn-0.7Cu in Soldering and Coating Processes
 Kazuhiro Nogita, The University of Queensland; Keith Sweatman, Tetsuro Nishimura, Nihon Superior Co. Ltd.


Tuesday October 16, 2018 11:00am - 12:30pm CDT
Exhibit Hall Theater

1:30pm CDT

APT2: Assembly and Reliability of Bottom Termination Components
Chair: *Pradeep Lall, Auburn University
Co-Chair: Satyajit Walwadkar, Ph.D., Intel Corporation

>>The Influence of Printed Circuit Board Thickness on the Thermal Fatigue Reliability of Quad Flat No-Lead Packages
*Richard Coyle,Ph.D., Nokia Bell Labs; David Ihms, Jagadeesh Radhakrishnan; *Neil Hubble, Akrometrix; Jesse deWitt; Charmaine Johnson; Jeffrey Lee; iST-Integrated Service Technology Inc.; Greg Wu; Grace O’Malley, iNEMI

>>As-Shipped Height vs. Mounted Height for LGA and BGA Packages
*Robert Darveaux, Ph.D.,Robert Skyworks; Howard Chen; Shaul Branchevsky; Mahendra Harsha

>>Reliability of TSOP/QFN/Passive Assemblies Under Harsh and LN2 Thermal Cycles
*Reza Ghaffarian, Ph.D., JPL

Tuesday October 16, 2018 1:30pm - 3:30pm CDT
Room 44

1:30pm CDT

FSA2: Solder Paste Rheology, Performance and Aging
Chair: Md Hasnine, Kester
Co-Chair: Dora Tuza, I Source Technical Services, Inc.

>>How Worst-Case Shipping Scenarios Affect Solder Paste Performance: Part 2
Brook Sandy-Smith, Erron Pender, Indium Corporation

>>Rheology of Flux and Solder Paste II: Shelf Life Study
Fan Gao, Ph.D., Dinesh Amin, Jennifer Allen, Kyle Loomis, Kester

>>Solder Powder Characteristics and Their Impact on Rheological Behavior of Solder Pastes
Arslane Bouchemit, M.Sc.,  Amir Nobari, Ph.D., Ana Da Silva Marques, Sylvain St-Laurent, Gilles L’Espérance, 5N Plus Inc - Micro Powders 

Tuesday October 16, 2018 1:30pm - 3:30pm CDT
Room 49

1:30pm CDT

SUB2: Enhanced Copper Plating Technologies
Chair: *Lars Boettcher, Fraunhofer IZM
Co-Chair: *Jörg Trodler, Heraeus Electronics

>>High Elongation Electroless Copper
Rogers Bernards, Judy Ding, Boen Li, Richard Retallick,  MacDermid Enthone Electronic Solutions

>>The Benefits of Using Insoluble Anodes in Acid Copper Plating
*George Milad, Uyemura International Corporation

>>Innovative CU Electroplating Process for Any Layer via Fill With Planer via Top and Thin Surface Copper
Saminda Dharmarathna, Ph.D., Todd Clark, William Bowerman, Kesheng Feng, Jim Watkowski, MacDermid Enthone Electronic Solutions

Tuesday October 16, 2018 1:30pm - 3:30pm CDT
Room 48

1:30pm CDT

Spotlight 2
FREE for all attendees on the expo show floor!

Chair: Dennis Fritz, SAIC at NAVSEA Crane (Retired)

Presenting at 1:30 PM
>>Trusted Electronics: Recognizing and Addressing the Need
Dean May, US Navy; Randy Cherry, Richard Snogren, Mark Kirkman, IPC

Presenting at 2:00 PM
>>Evaluating “Hybrid” Conformal Coating Chemistries and Processes to Expand the Performance Map for Circuit Board Protection
Jim Stockhausen, Electronics & Engineering Materials ELANTAS PDG Inc.

Presenting at 2:30 PM
>>The Relatively of Harsh Environments and How to Improve Reliability        
*Michael Konrad, Aqueous Technologies

Presenting at 3:00 PM
>>Silicone Science Innovates New UV Curing Conformal Coatings
Chelsea Quinn, The Dow Chemical Company




Tuesday October 16, 2018 1:30pm - 3:30pm CDT
Exhibit Hall Theater

1:30pm CDT

MFX2: Assembly Challenges
Chair: *Iulia Muntele, Ph.D., Sanmina Corporation
Co-Chair: *Robert Boguski, Datest Corp.

>>Cavity Board SMT Assembly Challenges
Brett Grossman, *Dudi Amir, Intel Corporation

>>How Does Printed Solder Paste Volume Affect Solder Joint Reliability?
*Jasbir Bath, Bath Consultancy; *Greg Smith, BlueRing Stencils; *Tony Lentz, FCT Assembly, Inc.

>>Qualitative Model Describing Hot Tear Above VIPPOs and Numerous Other Design Elements
Günter Gera, Yin Jizhe, Udo Welzel, Robert Bosch GmbH

>>Technology for Components with a High Position Accuracy
*Jörg Trodler, Heraeus Electronics

Tuesday October 16, 2018 1:30pm - 4:00pm CDT
Room 46

6:00pm CDT

¡Livin' La Vida SMTA!
Tuesday, October 16, 6:00pm
Adobe Gila's Rosemont
5455 Park Pl, Rosemont, IL 60018

No time for siesta, it's time for a fiesta at SMTAI!

Get ready to party on Tuesday, October 16 as we enjoy great music, tasty tacos, sizzling fajitas, chips and salsa and beverages! Grab some amigos and props to take some pictures in our photo booth!

TicketsThe cost is $25 per person in advance ($30 at the door.) Order your tickets directly online here or when you register for the conference.
All fiesta tickets include access to our amazing buffet and a drink ticket. 

For more information contact Karlie Severinson (karlie@smta.org).


Tuesday October 16, 2018 6:00pm - 9:00pm CDT
Adobe Gilas 2, 5455 PARK PL ROSEMONT, IL 60018
 
Wednesday, October 17
 

7:00am CDT

Fun Run
CALLING ALL RUNNERS!

You don't have to skip your run just because you are traveling. Join us for a 5 mile run on Wednesday, October 17 at 7:00 am in the Doubletree lobby. Select the free option when registering for SMTA International or bring some friends and show up that morning. Complimentary sport phone cases will be given to all runners.


Wednesday October 17, 2018 7:00am - 8:00am CDT
DoubleTree Lobby

8:00am CDT

MFX3: Void Reduction/BTC Challenges in Assembly
Chair: Neeta Argawal, Benchmark Electronics
Co-Chair: Timothy O'Neill, AIM Solder

>>Practical Verification of Void Reduction Method for BTC Using Exposed Via in Pad
*Iulia Muntele, Ph.D., Sanmina Corporation

>>Characterizing Voiding in BTC Center Pads
*Chrys Shea, Shea Engineering Services; Neil Poole, Ph.D., Henkel Electronic Materials

>>Solder Paste Selection Challenges for Bottom Termination Components (BTC) Attach
*Anna Lifton, Westin Bent, Paul Salerno, Jason Fullerton, Frank Andres, Alpha Assembly Solutions

Wednesday October 17, 2018 8:00am - 9:30am CDT
Room 46

8:00am CDT

APT3: Package Warpage Effects on Assembly and Reliability
Chair: Robert Darveaux, Skyworks Solutions, Inc
Co-Chair: Steve Murray, Northrup Gumman

>>Effect of Package Warpage and Expansion Characteristics on Failure Modes in Board-Level Thermal Cycling
*Andrew Mawer, NXP Semiconductors

>>Warpage of Flexible-Board Assemblies with BGAs During Reflow and Post-Assembly Usage
*Pradeep Lall, Ph.D., Auburn University

>>Thermal Shadow Moiré to Cross-Section Correlation Study
Jorge Arellano, Steven Perng, Cisco Systems; Edgardo Alvarez, Jabil Mexico;  Neil Hubble, Akrometrix

Wednesday October 17, 2018 8:00am - 10:00am CDT
Room 44

8:00am CDT

FSA3: Considerations for Assuring Reliable Assemblies
Chair: *Phil Kinner, Electrolube
Co-Chair: Nilesh Badwe, Intel Corporation

>>Dissolution Rate of Specific Elements in SAC305 Solder
*David Hillman, Ross Wilicoxon, Tim Pearson, Paul McKenna, Rockwell Collins

>>Selective Soldering Design for Reliability Using a Novel Test Board and SIR Test Method
*Mike Bixenman, DBA, KYZEN Corporation; *Mark McMeen, STI Electronics; *Denis Jean, Kester Solder; Joe Clure, Kurtz Ersa

>>Development of an Enhanced Low Melting Point Alloy
Steven Teliszewski, Interflux Electronics N.V. ; Albrecht Beck, ERSA North America

Wednesday October 17, 2018 8:00am - 10:00am CDT
Room 49

8:00am CDT

SUB3: PCB Reliability
Chair: *Lars Boettcher, Fraunhofer IZM
Co-Chair: *Jörg Trodler, Heraeus Electronics

>>BGA Pad Cratering and Peeling During SMT Reflow
Joe Fuller, Amit Abraham, Aravind Munukutla, Ian Williams, Intel Corporation

>>PCB Reliability – and How to Audit Your Supply Base to Insure It!
Yashesh Sutariya, Saturn Electronics

>>Influence of Bonding Parameters on Reliability of Cu Wire-bonding to Electroless Ni/Pd/Au Plating
*Yoshinori Ejiri, Takehisa Sakurai, Yoshinori Arayama, Yoshiaki Tsubomatsu, Kiyoshi Hasegawa, Hitachi Chemical Co., Ltd.

>>Comprehensive Study of Various Short Failures on Printed Circuited Board
Xiao He, Baojun Qiu, Daojun Luo, CEPREI

Wednesday October 17, 2018 8:00am - 10:00am CDT
Room 46

9:00am CDT

Electronics Exhibition
Many of the 170 exhibiting companies will bring working equipment that you can see for yourself.

Spotlight Sessions:
Attend Free Technical Sessions in the Exhibit Hall Theater!

Free Activities on the Show Floor:
>>Poster Session Tuesday, October 16 @ 12pm
>>Tech Tours Tuesday, October 16 & Wednesday, October 17
>>Metallographic Photo Contest Display Tuesday, October 16 & Wednesday, October 17
>>Career Center Tuesday, October 16 & Wednesday, October 17
>>Appreciation Reception Wednesday, October 17 @ 3:30pm

Wednesday October 17, 2018 9:00am - 4:00pm CDT
Exhibit Hall

10:30am CDT

APT4: Board Level Reliability
Chair: Brian Roggeman, Qualcomm Technologies Inc.
Co-Chair: Thomas Zanatta, Zebra Technologies

>>Solder-Joint Reliability of a 0.65mm Molded Array Package for Automotive Applications
*Burton Carpenter, Mollie Benson; *Andrew Mawer, NXP Semiconductors

>>Characterization of SiP Assembly and Reliability Under Thermal Cycles
Jim Wilcox, Universal Instruments Corporation

>>Effective Approach to Enhance The Shock Performance of Ultra-large BGA Components
 Cherif Guirguis, Weidong Xie, Ph.D., Mudasir Ahmad, Gnyaneshwar Ramakrishna, Jianghai Gu, Cisco Systems

Wednesday October 17, 2018 10:30am - 12:00pm CDT
Room 44

10:30am CDT

FSA4: Low Melting Point Materials Development
Chair: Andy Behr, US Panasonic
Co-Chair: Olga Spaldon-Stewart, Kester

>>Novel High Reliability Low Temperature Solder Alloys
*Ning-Cheng, Lee, Ph.D., Francis Mutuku, Jie Geng, Hongwen Zhang , Indium Corporation

>>A Study on the Minimum and Maximum Temperatures of the Reflow Process in SMT Assembly on Paste Ccontaining Bismuth Alloys Combined With Lead-Free Solder Spheres
*Martin Anselm, Ph.D., Priscilla Gomez, Tayler Swanson, Rochester Institute of Technology (RIT)

>>Engineered Flux for Low Temperature Solders
Ramakrishna Hosur Venkatagiriyappa, Ph.D., Harish H S, Manjuvani J, Vangapandu Bhaskar, Ramesh Kumar, Siuli Sarkar and Vikas Patil, Alpha Assembly Solutions

Wednesday October 17, 2018 10:30am - 12:00pm CDT
Room 49

10:30am CDT

MFX4: Cleaning & Coating
Chair: Sal Sparacino, ZESTRON USA
Co-Chair: Jason Fullerton, Alpha Assembly Solutions

>>Sharp Edge Coverage and Coating Thickness in Determining Performance of Liquid Applied Conformal Coatings in Harsh Environments
Phil Kinner, Electrolube

>>SIR Characterization of No-Clean Flux Residues Under the QFN Component Using Different PCB Board Design Options
*Mike Bixenman, DBA, David Lober, KYZEN Corporation; *Mark McMeen, Collin Langley, STI Electronics

>>Assessing the Implications of Fine Mesh Solder Powder on Flux Residue Removal
Kalyan Nukala, M.S.Ch.E., Ravi Parthasarathy, M.S.Ch.E., ZESTRON Americas; Tim O’Neill, AIM; Terry Munson, Foresite


Wednesday October 17, 2018 10:30am - 12:00pm CDT
Room 46

10:30am CDT

SUB4: Surface Finish Panel Discussion - What's new or different?
Chair: *Don Banks, Abbott
Co-Chair: Lenora Clark, MacDermid Enthone

>>How Does Surface Finish Affect Solder Paste Performance?
*Tony Lentz, FCT Assembly, Inc.

>>Surface Finish Panel
Moderator:

Panelists:
*Julie Silk, Keysight Techonologies
*Lothar Henneken, Ph.D.,Robert Bosch GmbH
Rick Nichols, Atotech
*Srinivas Chada, Stryker



Wednesday October 17, 2018 10:30am - 12:00pm CDT
Room 48

10:30am CDT

Spotlight 3
FREE for all attendees on the expo show floor!

Chair: Bob Wettermann, BEST Inc

Presenting at 10:30 AM
>>Packaging’s Impact on Reliability        
Keith Donaldson, Chris Brown, Engineered Materials, Inc.

Presenting at 11:00 AM
>>Modeling Temperature Cycle Fatigue Life of Select SAC Solders
*Michael Osterman, Ph.D., CALCE/University of Maryland

Wednesday October 17, 2018 10:30am - 12:00pm CDT
Exhibit Hall Theater

1:00pm CDT

Learning Lab: Stacked Microvia/Weak Interface Microvia Reliability (Post-Assembly) Project Status
Speakers/Moderators:
Jaroslaw (Jerry) Magera, Motorola Solutions
Jimmy Baccam/Don Dupriest, Lockheed Martin
Greg Lengacher/Jeff Harms, US Navy
Marc Carter, SAIC


Industry surveys show that HDI technology has experienced a healthy growth from 2000 to present day. The actual CAGR from 2016 to 2017 was double digits. Technological advances are relying more and more on microvia designs. More use and testing has revealed that there are reliability concerns surrounding those designs. In this Learning Lab, we will take a look at the currently accepted methods for microvia reliability testing and expose some weaknesses in the accuracy of those tests when compared to real world working environments. The presentations will be designed to increase awareness of this issue and foster discussion.
  • Current understanding of the problem and mitigation measures in place - Motorola
  • FMEA Project Definition (“Fishbone”, Taguchi) - Lockheed Martin
  • Microvia Reliability Modeling and Simulation (ANSYS) - US Navy


Wednesday October 17, 2018 1:00pm - 2:30pm CDT
Room 48

1:00pm CDT

APT5: Advances in Technology for Power Packaging
Chair: *Marie Cole, IBM Corporation
Co-Chair: *Jim Wilcox, Universal Instruments Corporation

>>New Soldering Technology for High Temperature Applications: Hot Powder Connection (HotPowCon)
Steffen Käss, *Jörg Trodler, S. Fritzsche, D.Feil, T.Herberholz, Heraeus Deutschland GmbH & Co.KG

>>Liquid Dispensed Thermal Interface Materials for Electronics Applications  
John Timmerman, Ph.D., Henkel

>>Investigation of Copper Sinter Material for Die Attach
*Christian Schwarzer, Heraeus Deutschland GmbH

Wednesday October 17, 2018 1:00pm - 3:00pm CDT
Room 44

1:00pm CDT

MFX5: Reflow Technologies
Chair: *Ray Whittier, BAE Systems
Co-Chair: *Chrys Shea, Shea Engineering Services

>>Reflow Blower and Vibration Characterizaion, Effect on BGA Bridging
Jason Stafford, Supriya Agrawal, Intel Corporation

>>Operation of a Vacuum Reflow Oven with Preliminary Void Reduction Data
Fred Dimock, BTU International

>>Void Reduction in Reflow Soldering Processes by Sweep Stimulation of PCB Substrate – DoE Tests
*Viktoria Rawinski, Joe Clure, ERSA; Denis Jean, Marcel Buck, Kester

Wednesday October 17, 2018 1:00pm - 3:00pm CDT
Room 46

1:00pm CDT

SUB5: Microvia Learning Lab
FREE for all attendees!

Chair: Marc Carter, SAIC

Industry surveys show that HDI technology has experienced a healthy growth from 2000 to present day. The actual CAGR from 2016 to 2017 was double digits. Technological advances are relying more and more on microvia designs. More use and testing has revealed that there are reliability concerns surrounding those designs. In this Learning Lab, we will take a look at the currently accepted methods for microvia reliability testing and expose some weaknesses in the accuracy of those tests when compared to real world working environments. The presentations will be designed to increase awareness of this issue and foster discussion.

>>Current Understanding of the Problem and Mitigation Measures in Place
J.Magera, Motorola

>>FMEA Project Definition
J. Baccam/D.Dupriest, Lockheed Martin

>>Microvia Reliability Modeling and Simulation
G. Lengacher/J. Harms, US Navy


Wednesday October 17, 2018 1:00pm - 3:00pm CDT
Room 48

1:30pm CDT

Spotlight 4
FREE for all attendees on the expo show floor!

This panel will bring together both users and suppliers of Pb-free solder materials to discuss how the definition and expectations related to "high reliability performance" are evolving. We will discuss not only alloy reliability, but other facets of reliability related to board material choices and post-manufacturing surface residues. 

Moderator: Brook Sandy-Smith, Indium Corporation

>>Rising Expectations for "High Reliability": A Panel Discussion
Panelists:
*Richard Coyle, Ph.D., Nokia Bell Labs
*Dave Hillman, Rockwell Collins
Terry Munson, Foresite, Inc.
Kris Troxel, HP, Inc.




Wednesday October 17, 2018 1:30pm - 3:00pm CDT
Exhibit Hall Theater

3:00pm CDT

Beer Tasting & Expo Reception
Come help us recognize the companies who have supported the local SMTA events by bringing equipment, technology and knowledge to your engineers and operators across the globe. These companies' commitment and participation at the local level is what the SMTA is about. Celebrate with us on Wednesday, October 17 at 3:00 p.m. and sample beverages from our SMTA chapter regions.

Wednesday October 17, 2018 3:00pm - 4:00pm CDT
Exhibit Hall Courtyard
 
Thursday, October 18
 

8:00am CDT

APT6: Reliability of Intermetallics in Various Interconnects
Chair: *Burton Carpenter, NXP Semiconductors
Co-Chair: *Don Banks, Abbott

>>Comparison of Reliability of Copper, Gold, Silver, and PCC Wirebonds Under Sustained Operation at 200C
*Pradeep Lall, Ph.D., Shantanu Deshpande, Luu Nguyen, Auburn University

>>Copper-Tin Intermetallics: Their Importance, Growth Rate, and Nature
*Ron Lasky, Ph.D., Indium Corporation


>>The Role of Nickel in Solder Alloys - Part 2. The Effect of Ni on The Integrity of The Interfacial Intermetallic in Sn-Based Solder Joints to Copper Substrates
Kazuhiro Nogita, The University of Queensland; Keith Sweatman; Tetsuro Nishimura, Nihon Superior Co. Ltd.

Thursday October 18, 2018 8:00am - 9:30am CDT
Room 44

8:00am CDT

INS1: Inspection Applications
Chair: *Bill Cardoso, Ph.D., Creative Electron
Co-Chair: *Keith Bryant, YXLON International GmbH

>>How X-ray Technology is Improving the Electronics Assembly Process
Griffin Lemaster, Creative Electron

>>Continuing Test Point Management Throughout a PCB Design Flow

Zac Elliott, Mark Laing, Mentor, a Siemens Business

>>Practical Implementation of Assembly Processes for Low Melting Point Solder Pastes
Miloš Lazić, Brook Sandy-Smith, Indium Corporation; *Martin Anselm, Rochester Institute of Technology (RIT) 

Thursday October 18, 2018 8:00am - 9:30am CDT
Room 48

8:00am CDT

MFX6: Manufacturing Operational Challenges
Chair: *Jason Keeping, P.E., Celestica, Inc.
Co-Chair: Warren Harper, Honeywell Aerospace

>>Accelerating the Solder Paste Evaluation Process
*Chrys Shea, Shea Engineering Services

>>Requirements on a Class „0“ EPA – BASICS, STANDARDS, ESD Equipments and Measurements
Hartmut Berndt, Dipl.-Ing., B.E.STAT ESD Competence Centre

>>Experimental Study on the Capability and Performance of a Jetting Dispensing Unit In Components Fastening
*Martin Anselm, Ph.D., Keyla Y. Bastardo, Rochester Institute of Technology (RIT)

Thursday October 18, 2018 8:00am - 9:30am CDT
Room 46

8:00am CDT

LF1: Low Temp Solder Paste and its Process Development
Chair:  Jason Fullerton, Alpha Assembly Solutions
Co-Chair: Debbie Carboni, KYZEN Corporation

>>iNEMI Project on Process Development of BiSn-Based Low Temperature Solder Pastes Part IV: Comprehensive Mechanical Shock Tests on POP Components Having Mixed BGA BiSn-SAC Solder Joints
*Raiyo Aspandiar, Ph.D., Jagadeesh Radhakrishnan, Kevin Byrd, Shunfeng Cheng, Scott Mokler, Kok Kwan Tang, Intel Corporation; Haley Fu, iNEMI; *Babak Arfaei,  Binghamton University; Morgana Ribas, Alpha Assembly Solutions; Jimmy Chen, Flex; Qin Chen, Eunow; Richard Coyle, Nokia; Derek Daily, Senju Comtek Corp., Sophia Feng, Celestica Inc.; Mark Krmpotich, Microsoft Corporation; Brook Sandy-Smith,  Anny Zhang, Indium Corporation; Greg Wu, Wistron; Wilson Zhen, Lenovo

>>Low Temperature Soldering Reflow Optimization for Enhanced Mechanical Reliability
*Morgana Ribas, Ph.D., *Morgana Ribas, Ph.D., H. V. Ramakrishna, Laxminarayana Pai, Raghu Raj Rangaraju, Suresh Telu, Bhaskar Vangapandu, Ramesh Kumar, Traian Cucu, Siuli Sarkar, Alpha Assembly Solutions

>>The Impact of the Alloy Composition on Shear Strength of Low Temperature Lead Free Solder Joints
*Traian Cucu, Ph.D., Anna Lifton, Alpha Assembly Solutions

Thursday October 18, 2018 8:00am - 9:30am CDT
Room 49

10:00am CDT

MFX7: Rework

Chair: Robert Kinyanjui, Ph.D., John Deere Electronic Solutions, Inc.
Co-Chair: *Iulia Muntele, Ph.D., Sanmina Corporation

>>Rework Practices for µLED’s and Other Highly Miniaturized SMT Components
Neil O'Brien, Finetech

>>Laser Rework Process  For BGA a New Method for PCBA Rework Instead of Hot Air/Infrared Heating
Vikalp Narayan, John Burke, Naveen Kini, Ben choi, Robin Zhu, Herrick Fu , Alex Dai, Western Digital

>>Comparison Study Between Lead Free Solder and Low Temperature Solder for Hand Soldering Rework
Steve Folsom, Maria Mejias-Hernandez, Connie Lavinger,  Intel Corporation

Thursday October 18, 2018 10:00am - 11:30am CDT
Room 46

10:00am CDT

APT7: Reliaiblity of Low Temperature Solder (LTS) Interconnects
Chair: *Charles Woychik, i3Electronics
Co-Chair: *Steve Greathouse, Plexus Corp.

>>Low Temperature Solder Interconnect Reliability and Potential Application in Enterprise Computer and Automotive Electronics

*Paul Wang, Ph.D., David He, Vivi Cao, Jopy Tan, Mitac International Corporation

>>Low Melting Temperature Interconnect Thermal Cycling Performance Enhancement Using Elemental Tuning and Edgebond Application
*Tae Kyu Lee, Ph.D., Andy Hsiao, Mohamed Sheikh, Imbok Lee, Young-Woo Lee, Edward Ibe, Karl Loh, Tae-Kyu Lee, Portland State University

>>A Novel Approach To Determine Mechanical Fatigue Performance of Solder Material Using Single Solder Joint Test
Satyajit Walwadkar, Ph.D., *Raiyo Aspandiar, Ph.D., George Hsieh, Kevin Byrd, Intel Corporation

>>Thermomechanical Reliability of Low-Temperature Solder Alloys for Mid-Power LED Packages
*Ranjit Pandher, Ph.D., Niveditha Nagarajan; Nicholas Herrick, Alpha Assembly Solutions

Thursday October 18, 2018 10:00am - 12:00pm CDT
Room 44

10:00am CDT

INS2: Inspection 4.0

Chair: *Keith Bryant, YXLON International GmbH
Co-Chair: *Diganta Das, Ph.D., CALCE/ University of Maryland

>>Advancement of Solder Paste Inspection (SPI) Tools to Support Industry 4.0 & Package Scaling
Larry Pymento, Abhishek Prasad, Ph.D., Srinivasa R Aravamudhan and Chandru Periasamy, Intel Corporation

>>Combining Automated Advanced Process Control (APC) with Mounter Feedback to Revolutionize the PCBA Process
David Suh, Brent Fischthal, Koh Young America, Inc.

>>Industry 4.0 for Inspection in the Electronics Industry
*Ragnar Vaga, YXLON International GmbH

>>Extending 3D MRS Technology to Address Challenging Inspection and Measurement Applications
John Hoffman, Ph.D., CyberOptics Corporation

Thursday October 18, 2018 10:00am - 12:00pm CDT
Room 48

10:00am CDT

LF2: High Reliability Pb-free Alloys, SAC305 and Beyond
Chair: Adam Klett, Ph.D., Harris Corporation
Co-Chair:  Jose Ma Servin Olivares, Continental Corporation

>>Effect Of Aging on SAC 305 Solder Joints Reliability in Accelerated Fatigue Shear Test
Raed Al Athmneh, A. Garcia, R. Macias, D. Vazquez, R. Ibarra, M. Abtew, Auburn University

>>Reflow Profiling for Next-Generation Solder Alloys
Meagan Sloan, Brook Sandy-Smith, Indium Corporation; MB Allen, KIC

>>Alloy Composition and Thermal Fatigue of High Reliability Pb-Free Solder Alloys       
*Richard Coyle, Joe Smetana, Nokia Bell Labs; Dave Hillman, Rockwell Collins; Charmaine Johnson, Richard Parker, Brook Sandy-Smith, Hongwen Zhang, Jie Geng, Indium Corporation; Michael Osterman, University of Maryland/ CALCE; Babak Arfaei, Ford Motor Company; Andre Delhaise, Celestica, Inc,; Keith Howell, Nihon Superior Company, Ltd.; Jasbir Bath, Bath Consultancy; Stuart Longgood, Delphi; Andre Kleyner, Sagg Computers; Julie Silk, Keysight Technologies; Ranjit Pandher, Eric Lundeen, and Jerome Noiray, Alpha Assembly Solutions

>>Effect of TIM Compresion Load on BGA Reliability
*Lars Bruno, Ericsson AB; Nicholas Graziano, SUNY; Harry Schoeller, Universal Instruments Corporation 

Thursday October 18, 2018 10:00am - 12:00pm CDT
Room 49

1:00pm CDT

INS3: Inspection Capabilities

Chair: *Robert Boguski, Datest Corp.
Co-Chair: Todd McFadden, Bose

>>X-ray Inspection: New Capabilities and Methodology for PCBA Analysis
Julien Perraud, Arnaud Grivon, Shaďma Enouz-Vedrenne, Thales

>>Assessment of 2nd Level Interconnect Quality in Flip Chip Ball Grid Array (FCBGA) Package Using Laser Ultrasonic Inspection Technique
Vishnu V.B. Reddy, Chidinma C. Imediegwu, Chong Ye, I. Charles Ume, Bryan Rogers, Cherif Guirguis, Kathy Derksen, Parimal Patel, Georgia Institute of Technology; Kola Akinade, Cisco Systems

>>The Hygroscopic Capacity of Integrated Circuit Packages and Printed Circuit Boards
Steven Watson, David Rathbone, Matthew Domanic, Kaitlyn Fox, VTO Labs

Thursday October 18, 2018 1:00pm - 2:30pm CDT
Room 48

1:00pm CDT

LF3: Properties and Behavior of Solders Containing Bismuth
Chair: *Srinivas Chada, Ph.D., Stryker
Co-Chair: Brook Sandy-Smith, Indium Corporation

>>Crack Propagation Mechanism Study on Bismuth Contained Sn base Lead Free Solder Under Thermo-Mechanical Stress
Imbok Lee, Aakash Valliappan, Young-Woo Lee, Tae-Kyu Lee, MK Electron Co., Ltd.

>Restoration of Microstructure and Mechanical Properties of Lead-Free Bismuth Containing Solder Joints After Accelerated Reliability Testing using a Thermal Treatment
*Andre Delhaise, Ph.D., Ivan Tan, Polina Snugovsky, *Jeff Kennedy, Celestica, Inc.; Mikaella Brillantes, Doug D. Perovic, Department of Materials Science & Engineering, University of Toronto; *David Hillman, David Adams, Rockwell-Collins; Stephan Meschter, BAE Systems; Milea Kammer, Honeywell Aerospace; Ivan Straznicky, Curtiss-Wright

>>Low-Temperature Soldering with Ordered Alloys
Mo Biglari, A. Das, L.C.P. Krassenburg, J.H.G. Brom, N.J.A. van Veen, A.A. Kodentsov , Mat-Tech BV

Thursday October 18, 2018 1:00pm - 2:30pm CDT
Room 49

3:00pm CDT

INS4: Counterfeit Detection
Chair: *Terry Kocour, Lockheed Martin
Co-Chair:  Mac Butler, Northrop Grumman Corporation

>>Essential Tools to Combat the Ingress of Counterfeit Materials
*Cameron Shearon, Shearon Consulting

>>Counterfeit Detection Using X-Ray Image as a Fingerprint
*Glen Thomas, Ph.D., Creative Electron, Inc.

>>Use of Component Documentation and Supply Chain for Counterfeit Avoidance
*Diganta Das, Ph.D., CALCE/ University of Maryland

Thursday October 18, 2018 3:00pm - 4:30pm CDT
Room 48

3:00pm CDT

LF4: Relaibility of Doped Sn Based Lead-Free Alloys
Chair: *Raiyo Aspandiar, Ph.D., Intel Corporation
Co-Chair: Robert Kinyanjui, Ph.D., John Deere Electronic Solutions, Inc.

>>Effect on Creep Rate of Alloying Additions to Ni -Stabilized Sn-Cu Eutectic Solders
*Keith Sweatman, Tetsuya Akaiwa, Tetsuro Nishimura, Nihon Superior Company, Ltd

>>Long Term Isothermal Aging of Various BGA Packages Using Doped Lead Free Solder Alloys
*Anto Raj,  Sharath Sridhar, Ph.D., Sivasubramanian Thirugnanasambandam, Ph.D.,  Thomas Sanders, Ph.D., John Evans, Ph.D., Wayne Johnson, Ph.D., Sa'd Hamasha, Ph.D., Auburn University

>>The Effect of Bismuth, Antimony, or Indium on the Thermal Fatigue of High Reliability Pb-Free Solder Alloys
*Richard Coyle, Joe Smetana, Nokia Bell Labs; Dave Hillman, Rockwell Collins; Charmaine Johnson, Richard Parker, Brook Sandy-Smith, Hongwen Zhang, Jie Geng, Indium Corporation; Michael Osterman, University of Maryland/ CALCE; Babak Arfaei, Ford Motor Company; Andre Delhaise, Celestica, Inc,; Keith Howell, Nihon Superior Company, Ltd.; Jasbir Bath, Bath Consultancy; Stuart Longgood, Delphi; Andre Kleyner, Sagg Computers; Julie Silk, Keysight Technologies; Ranjit Pandher, Eric Lundeen, and Jerome Noiray, Alpha Assembly Solutions

Thursday October 18, 2018 3:00pm - 4:30pm CDT
Room 49